XA-000-08-002-000-003-225-01 23.08.23 11:02:27
ADC4
SMX_7
CSA
Calibration
ADC
CSA
Info
11:02:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:02:27:ST3_Shared:INFO: -------------------------Microcable-------------------------
11:02:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:02:29:smx_tester:INFO: Scanning setup
11:02:29:elinks:INFO: Disabling clock on downlink 0
11:02:29:elinks:INFO: Disabling clock on downlink 1
11:02:29:elinks:INFO: Disabling clock on downlink 2
11:02:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:02:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:02:29:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
11:02:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:02:29:elinks:INFO: Disabling clock on downlink 0
11:02:29:elinks:INFO: Disabling clock on downlink 1
11:02:29:elinks:INFO: Disabling clock on downlink 2
11:02:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:02:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:02:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:02:29:elinks:INFO: Disabling clock on downlink 0
11:02:29:elinks:INFO: Disabling clock on downlink 1
11:02:29:elinks:INFO: Disabling clock on downlink 2
11:02:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:02:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:02:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:02:29:setup_element:INFO: Scanning clock phase
11:02:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:02:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:02:29:setup_element:INFO: Clock phase scan results for group 0, downlink 0
11:02:29:setup_element:INFO: Eye window for uplink 0 : _____________________________________________________XXXXXXX____________________
Clock Delay: 16
11:02:29:setup_element:INFO: Setting the clock phase to 16 for group 0, downlink 0
11:02:29:setup_element:INFO: Scanning data phases
11:02:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:02:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:02:34:setup_element:INFO: Data phase scan results for group 0, downlink 0
11:02:34:setup_element:INFO: Eye window for uplink 0 : ____XXXXX_______________________________
Data delay found: 26
11:02:34:setup_element:INFO: Setting the data phase to 26 for uplink 0
11:02:34:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 16
Window Length: 73
Eye Windows:
Uplink 0: _____________________________________________________XXXXXXX____________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
]
11:02:34:setup_element:INFO: Beginning SMX ASICs map scan
11:02:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:02:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:02:34:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
11:02:35:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
11:02:35:uplink:INFO: Setting uplinks mask [0]
11:02:36:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0
11:02:37:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map:
ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
Clock Phase Characteristic:
Optimal Phase: 16
Window Length: 73
Eye Windows:
Uplink 0: _____________________________________________________XXXXXXX____________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
11:02:37:setup_element:INFO: Performing Elink synchronization
11:02:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:02:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:02:37:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
11:02:37:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
11:02:37:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
11:02:37:uplink:INFO: Enabling uplinks [0]
11:02:37:ST3_emu:INFO: Number of chips: 1
11:02:37:ST3_emu:INFO: Chip address: 0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
11:02:38:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
============== Starting SMX ID burn ==============
11:02:42:asictest:WARNING: Fused ID is not zero 6359364699116551697
11:02:42:asictest:INFO: Starting ADC calibration/scan
11:02:48:asictest:INFO: 0, 0, 0.000000
11:02:53:asictest:INFO: 1, 39, 0.300000
11:02:59:asictest:INFO: 2, 79, 0.600000
11:03:05:asictest:INFO: 3, 124, 0.900000
11:03:11:asictest:INFO: 4, 170, 1.199000
11:03:17:asictest:INFO: 5, 185, 1.300000
11:03:22:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV]
11:03:22:asictest:INFO: 21.40 1202.30 803.32 0.00
11:03:24:ST3_smx:INFO: chip: 0-7 21.395503 C 1202.295640 mV
11:03:24:ST3_smx:INFO: # loops 0
11:03:25:ST3_smx:INFO: # loops 1
11:03:27:ST3_smx:INFO: # loops 2
11:03:28:ST3_smx:INFO: # loops 3
11:03:30:ST3_smx:INFO: # loops 4
11:03:31:ST3_smx:INFO: Total # of broken channels: 0
11:03:31:ST3_smx:INFO: List of broken channels: []
11:03:31:ST3_smx:INFO: Total # of broken channels: 0
11:03:31:ST3_smx:INFO: List of broken channels: []
11:03:32:asictest:INFO: Starting CSA scan -
11:03:33:asictest:INFO: 0, 0.065400
11:03:34:asictest:INFO: 9, 0.150700
11:03:35:asictest:INFO: 18, 0.228800
11:03:35:asictest:INFO: 27, 0.305200
11:03:36:asictest:INFO: 36, 0.377400
11:03:37:asictest:INFO: 45, 0.445000
11:03:37:asictest:INFO: 54, 0.501200
11:03:38:asictest:INFO: 63, 0.536700
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_08_23-11_02_27
OPERATOR : Kerstin S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID : 0000L000-M000 | side-P | index: (4/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
HW_ADDR : 0x7 | VERS_NO : 2.2
ASIC_ID : XA-000-08-002-000-003-225-01 | FUSED_ID : 6359364699116551697
IC_TEMP : 10.87 | VDDM : 1092.06 | AUX_INT : 0.00 | CsaBias : 92.15
CONF_FAIL_REG : 0
CSA_BIAS : 15
THR2_GLB : 30
ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
ADC_Chi2/NDF : 1.73111e-05 / 0
ADC_P0 : 0.00000e+00 ± 1.00000e+00
ADC_P1 : 7.72563e-03 ± 2.68082e-02
ADC_P2 : -3.84298e-06 ± 1.58596e-04
CSA_Chi2/NDF : 1.58756e-04 / 0
CSA_P0 : 6.21250e-02 ± 4.74241e-03
CSA_P1 : 1.02642e-02 ± 3.51658e-04
CSA_P2 : -4.17255e-05 ± 5.36711e-06
---------------------------------------
N_BROKEN_DISC : 0 | N_BROKEN_FAST : []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.3979', '1.800', '0.0941', '1.800', '0.1605', '6.999', '0.6895']
VI_after__Init : ['1.200', '0.3993', '1.800', '0.0931', '1.800', '0.1565', '7.000', '0.6904']
VI_at__the_End : ['1.200', '0.5347', '1.800', '0.0748', '1.800', '0.1689', '7.000', '0.6903']
11:03:50:ST3_Shared:INFO: /home/cbm/public_html/Test_LogDir/Microcable/XA-000-08-002-000-003-225-01//TestDate_2023_08_23-11_02_27/
Comment
J038 for test module, Pside