XA-000-08-002-000-003-229-01 23.08.23 11:04:36
ADC4
SMX_7
CSA
Calibration
ADC
CSA
Info
11:04:36:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:04:36:ST3_Shared:INFO: -------------------------Microcable-------------------------
11:04:36:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:04:38:smx_tester:INFO: Scanning setup
11:04:38:elinks:INFO: Disabling clock on downlink 0
11:04:38:elinks:INFO: Disabling clock on downlink 1
11:04:38:elinks:INFO: Disabling clock on downlink 2
11:04:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:04:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:04:38:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
11:04:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:04:38:elinks:INFO: Disabling clock on downlink 0
11:04:38:elinks:INFO: Disabling clock on downlink 1
11:04:38:elinks:INFO: Disabling clock on downlink 2
11:04:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:04:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:04:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:04:38:elinks:INFO: Disabling clock on downlink 0
11:04:38:elinks:INFO: Disabling clock on downlink 1
11:04:38:elinks:INFO: Disabling clock on downlink 2
11:04:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:04:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:04:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:04:38:setup_element:INFO: Scanning clock phase
11:04:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:04:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:04:38:setup_element:INFO: Clock phase scan results for group 0, downlink 0
11:04:38:setup_element:INFO: Eye window for uplink 0 : ____________________________________________________XXXXXX______________________
Clock Delay: 14
11:04:38:setup_element:INFO: Setting the clock phase to 14 for group 0, downlink 0
11:04:38:setup_element:INFO: Scanning data phases
11:04:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:04:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:04:43:setup_element:INFO: Data phase scan results for group 0, downlink 0
11:04:43:setup_element:INFO: Eye window for uplink 0 : ____XXXX________________________________
Data delay found: 25
11:04:43:setup_element:INFO: Setting the data phase to 25 for uplink 0
11:04:43:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 14
Window Length: 74
Eye Windows:
Uplink 0: ____________________________________________________XXXXXX______________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 25
Window Length: 36
Eye Window: ____XXXX________________________________
]
11:04:43:setup_element:INFO: Beginning SMX ASICs map scan
11:04:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:04:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:04:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
11:04:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
11:04:43:uplink:INFO: Setting uplinks mask [0]
11:04:45:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0
11:04:46:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map:
ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
Clock Phase Characteristic:
Optimal Phase: 14
Window Length: 74
Eye Windows:
Uplink 0: ____________________________________________________XXXXXX______________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 25
Window Length: 36
Eye Window: ____XXXX________________________________
11:04:46:setup_element:INFO: Performing Elink synchronization
11:04:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:04:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:04:46:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
11:04:46:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
11:04:46:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
11:04:46:uplink:INFO: Enabling uplinks [0]
11:04:46:ST3_emu:INFO: Number of chips: 1
11:04:46:ST3_emu:INFO: Chip address: 0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
11:04:47:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
============== Starting SMX ID burn ==============
11:04:51:asictest:WARNING: Fused ID is not zero 6359364699116551761
11:04:51:asictest:INFO: Starting ADC calibration/scan
11:04:57:asictest:INFO: 0, 0, 0.000000
11:05:03:asictest:INFO: 1, 42, 0.300000
11:05:08:asictest:INFO: 2, 80, 0.600000
11:05:14:asictest:INFO: 3, 126, 0.900000
11:05:20:asictest:INFO: 4, 174, 1.200000
11:05:26:asictest:INFO: 5, 191, 1.300000
11:05:31:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV]
11:05:32:asictest:INFO: 7.42 1200.27 799.91 0.00
11:05:33:ST3_smx:INFO: chip: 0-7 7.421622 C 1200.266765 mV
11:05:33:ST3_smx:INFO: # loops 0
11:05:35:ST3_smx:INFO: # loops 1
11:05:36:ST3_smx:INFO: # loops 2
11:05:38:ST3_smx:INFO: # loops 3
11:05:39:ST3_smx:INFO: # loops 4
11:05:41:ST3_smx:INFO: Total # of broken channels: 0
11:05:41:ST3_smx:INFO: List of broken channels: []
11:05:41:ST3_smx:INFO: Total # of broken channels: 0
11:05:41:ST3_smx:INFO: List of broken channels: []
11:05:42:asictest:INFO: Starting CSA scan -
11:05:43:asictest:INFO: 0, 0.067600
11:05:43:asictest:INFO: 9, 0.153900
11:05:44:asictest:INFO: 18, 0.233800
11:05:45:asictest:INFO: 27, 0.312600
11:05:45:asictest:INFO: 36, 0.384200
11:05:46:asictest:INFO: 45, 0.448400
11:05:47:asictest:INFO: 54, 0.491800
11:05:48:asictest:INFO: 63, 0.512800
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_08_23-11_04_36
OPERATOR : Kerstin S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID : 0000L000-M000 | side-P | index: (5/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
HW_ADDR : 0x7 | VERS_NO : 2.2
ASIC_ID : XA-000-08-002-000-003-229-01 | FUSED_ID : 6359364699116551761
IC_TEMP : 0.63 | VDDM : 1068.04 | AUX_INT : 0.00 | CsaBias : 86.35
CONF_FAIL_REG : 0
CSA_BIAS : 15
THR2_GLB : 30
ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
ADC_Chi2/NDF : 4.01197e-05 / 1
ADC_P0 : 0.00000e+00 ± 6.33401e-03
ADC_P1 : 7.91446e-03 ± 1.08378e-04
ADC_P2 : -5.84127e-06 ± 6.41591e-07
CSA_Chi2/NDF : 3.41424e-04 / 1
CSA_P0 : 6.13292e-02 ± 6.95474e-03
CSA_P1 : 1.11093e-02 ± 5.15707e-04
CSA_P2 : -6.04130e-05 ± 7.87087e-06
---------------------------------------
N_BROKEN_DISC : 0 | N_BROKEN_FAST : []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.4429', '1.800', '0.0876', '1.800', '0.1540', '7.000', '0.6894']
VI_after__Init : ['1.200', '0.4425', '1.800', '0.0870', '1.800', '0.1523', '7.000', '0.6906']
VI_at__the_End : ['1.200', '0.5081', '1.800', '0.0749', '1.800', '0.1672', '7.000', '0.6905']
11:06:09:ST3_Shared:INFO: /home/cbm/public_html/Test_LogDir/Microcable/XA-000-08-002-000-003-229-01//TestDate_2023_08_23-11_04_36/
Comment
J038 for test module, Pside