XA-000-08-002-000-003-234-01 23.08.23 11:10:53
ADC4
SMX_7
CSA
Calibration
ADC
CSA
Info
11:10:53:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:10:53:ST3_Shared:INFO: -------------------------Microcable-------------------------
11:10:53:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:10:54:smx_tester:INFO: Scanning setup
11:10:54:elinks:INFO: Disabling clock on downlink 0
11:10:54:elinks:INFO: Disabling clock on downlink 1
11:10:54:elinks:INFO: Disabling clock on downlink 2
11:10:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:10:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:10:54:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
11:10:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:10:54:elinks:INFO: Disabling clock on downlink 0
11:10:54:elinks:INFO: Disabling clock on downlink 1
11:10:54:elinks:INFO: Disabling clock on downlink 2
11:10:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:10:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:10:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:10:55:elinks:INFO: Disabling clock on downlink 0
11:10:55:elinks:INFO: Disabling clock on downlink 1
11:10:55:elinks:INFO: Disabling clock on downlink 2
11:10:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:10:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:10:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:10:55:setup_element:INFO: Scanning clock phase
11:10:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:10:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:10:55:setup_element:INFO: Clock phase scan results for group 0, downlink 0
11:10:55:setup_element:INFO: Eye window for uplink 0 : ____________________________________________________XXXXXXX_____________________
Clock Delay: 15
11:10:55:setup_element:INFO: Setting the clock phase to 15 for group 0, downlink 0
11:10:55:setup_element:INFO: Scanning data phases
11:10:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:10:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:11:00:setup_element:INFO: Data phase scan results for group 0, downlink 0
11:11:00:setup_element:INFO: Eye window for uplink 0 : ___XXXX_________________________________
Data delay found: 24
11:11:00:setup_element:INFO: Setting the data phase to 24 for uplink 0
11:11:00:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 15
Window Length: 73
Eye Windows:
Uplink 0: ____________________________________________________XXXXXXX_____________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 24
Window Length: 36
Eye Window: ___XXXX_________________________________
]
11:11:00:setup_element:INFO: Beginning SMX ASICs map scan
11:11:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:11:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:11:00:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
11:11:00:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
11:11:00:uplink:INFO: Setting uplinks mask [0]
11:11:01:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0
11:11:03:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map:
ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
Clock Phase Characteristic:
Optimal Phase: 15
Window Length: 73
Eye Windows:
Uplink 0: ____________________________________________________XXXXXXX_____________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 24
Window Length: 36
Eye Window: ___XXXX_________________________________
11:11:03:setup_element:INFO: Performing Elink synchronization
11:11:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:11:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:11:03:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
11:11:03:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
11:11:03:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
11:11:03:uplink:INFO: Enabling uplinks [0]
11:11:03:ST3_emu:INFO: Number of chips: 1
11:11:03:ST3_emu:INFO: Chip address: 0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
11:11:04:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
============== Starting SMX ID burn ==============
11:11:07:asictest:WARNING: Fused ID is not zero 6359364699116551841
11:11:08:asictest:INFO: Starting ADC calibration/scan
11:11:14:asictest:INFO: 0, 0, 0.000000
11:11:19:asictest:INFO: 1, 40, 0.300000
11:11:25:asictest:INFO: 2, 77, 0.600000
11:11:31:asictest:INFO: 3, 120, 0.900000
11:11:37:asictest:INFO: 4, 168, 1.200000
11:11:43:asictest:INFO: 5, 184, 1.300000
11:11:48:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV]
11:11:48:asictest:INFO: 0.11 1203.28 783.48 0.00
11:11:49:ST3_smx:INFO: chip: 0-7 0.113655 C 1203.278435 mV
11:11:49:ST3_smx:INFO: # loops 0
11:11:51:ST3_smx:INFO: # loops 1
11:11:53:ST3_smx:INFO: # loops 2
11:11:55:ST3_smx:INFO: # loops 3
11:11:56:ST3_smx:INFO: # loops 4
11:11:58:ST3_smx:INFO: Total # of broken channels: 0
11:11:58:ST3_smx:INFO: List of broken channels: []
11:11:58:ST3_smx:INFO: Total # of broken channels: 0
11:11:58:ST3_smx:INFO: List of broken channels: []
11:11:59:asictest:INFO: Starting CSA scan -
11:12:00:asictest:INFO: 0, 0.067000
11:12:01:asictest:INFO: 9, 0.152400
11:12:01:asictest:INFO: 18, 0.230300
11:12:02:asictest:INFO: 27, 0.306400
11:12:03:asictest:INFO: 36, 0.375600
11:12:03:asictest:INFO: 45, 0.437700
11:12:04:asictest:INFO: 54, 0.482900
11:12:05:asictest:INFO: 63, 0.507800
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_08_23-11_10_53
OPERATOR : Kerstin S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID : 0000L000-M000 | side-P | index: (7/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
HW_ADDR : 0x7 | VERS_NO : 2.2
ASIC_ID : XA-000-08-002-000-003-234-01 | FUSED_ID : 6359364699116551841
IC_TEMP : -6.91 | VDDM : 1092.81 | AUX_INT : 0.00 | CsaBias : 90.59
CONF_FAIL_REG : 0
CSA_BIAS : 15
THR2_GLB : 30
ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
ADC_Chi2/NDF : 1.71049e-05 / 0
ADC_P0 : 0.00000e+00 ± 1.00000e+00
ADC_P1 : 8.31060e-03 ± 2.60115e-02
ADC_P2 : -6.83471e-06 ± 1.55132e-04
CSA_Chi2/NDF : 2.12767e-04 / 0
CSA_P0 : 6.23208e-02 ± 5.49017e-03
CSA_P1 : 1.06777e-02 ± 4.07106e-04
CSA_P2 : -5.54894e-05 ± 6.21337e-06
---------------------------------------
N_BROKEN_DISC : 0 | N_BROKEN_FAST : []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.2722', '1.800', '0.0766', '1.800', '0.1530', '7.000', '0.6895']
VI_after__Init : ['1.200', '0.2723', '1.800', '0.0764', '1.800', '0.1534', '7.000', '0.6906']
VI_at__the_End : ['1.200', '0.5085', '1.800', '0.0721', '1.800', '0.1598', '7.000', '0.6908']
11:12:26:ST3_Shared:INFO: /home/cbm/public_html/Test_LogDir/Microcable/XA-000-08-002-000-003-234-01//TestDate_2023_08_23-11_10_53/
Comment
J038 for test module, Pside