
XA-000-08-002-000-004-139-02 15.11.23 09:38:34
ADC4

SMX_7

CSA

Calibration
ADC
CSA
Report.txt
09:38:34:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:38:34:ST3_Shared:INFO: -------------------------Microcable------------------------- 09:38:34:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:38:36:smx_tester:INFO: Scanning setup 09:38:36:elinks:INFO: Disabling clock on downlink 0 09:38:36:elinks:INFO: Disabling clock on downlink 1 09:38:36:elinks:INFO: Disabling clock on downlink 2 09:38:36:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:38:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:38:36:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0 09:38:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:38:36:elinks:INFO: Disabling clock on downlink 0 09:38:36:elinks:INFO: Disabling clock on downlink 1 09:38:36:elinks:INFO: Disabling clock on downlink 2 09:38:36:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:38:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:38:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:38:36:elinks:INFO: Disabling clock on downlink 0 09:38:36:elinks:INFO: Disabling clock on downlink 1 09:38:36:elinks:INFO: Disabling clock on downlink 2 09:38:36:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:38:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:38:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:38:36:setup_element:INFO: Scanning clock phase 09:38:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:38:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 09:38:37:setup_element:INFO: Clock phase scan results for group 0, downlink 0 09:38:37:setup_element:INFO: Eye window for uplink 0 : ____________________________________________________XXXXXXX_____________________ Clock Delay: 15 09:38:37:setup_element:INFO: Setting the clock phase to 15 for group 0, downlink 0 09:38:37:setup_element:INFO: Scanning data phases 09:38:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:38:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 09:38:42:setup_element:INFO: Data phase scan results for group 0, downlink 0 09:38:42:setup_element:INFO: Eye window for uplink 0 : _XXXXX__________________________________ Data delay found: 23 09:38:42:setup_element:INFO: Setting the data phase to 23 for uplink 0 09:38:42:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 0 Uplinks: [0] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 15 Window Length: 73 Eye Windows: Uplink 0: ____________________________________________________XXXXXXX_____________________ Data phase characteristics: Uplink 0: Optimal Phase: 23 Window Length: 35 Eye Window: _XXXXX__________________________________ ] 09:38:42:setup_element:INFO: Beginning SMX ASICs map scan 09:38:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:38:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 09:38:42:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 09:38:42:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 09:38:42:uplink:INFO: Setting uplinks mask [0] 09:38:43:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0 09:38:44:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 0 Uplinks: [0] ASICs Map: ASIC address 0x7: (ASIC uplink, uplink): (0, 0) Clock Phase Characteristic: Optimal Phase: 15 Window Length: 73 Eye Windows: Uplink 0: ____________________________________________________XXXXXXX_____________________ Data phase characteristics: Uplink 0: Optimal Phase: 23 Window Length: 35 Eye Window: _XXXXX__________________________________ 09:38:44:setup_element:INFO: Performing Elink synchronization 09:38:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:38:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 09:38:44:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 09:38:44:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 09:38:44:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0 09:38:44:uplink:INFO: Enabling uplinks [0] 09:38:44:ST3_emu:INFO: Number of chips: 1 09:38:44:ST3_emu:INFO: Chip address: 0x7 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7 09:38:45:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values ============== Starting SMX ID burn ============== 09:38:49:asictest:WARNING: Fused ID is not zero 6359364699116554418 09:38:49:asictest:INFO: Starting ADC calibration/scan 09:38:55:asictest:INFO: 0, 44, 0.000000 09:39:01:asictest:INFO: 1, 55, 0.300000 09:39:07:asictest:INFO: 2, 78, 0.600000 09:39:12:asictest:INFO: 3, 122, 0.900000 09:39:18:asictest:INFO: 4, 170, 1.200000 09:39:24:asictest:INFO: 5, 189, 1.300000 09:39:30:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV] 09:39:30:asictest:INFO: 6.77 1195.77 796.03 162.98 09:39:31:ST3_smx:INFO: chip: 0-7 6.768031 C 1195.771920 mV 09:39:31:ST3_smx:INFO: # loops 0 09:39:33:ST3_smx:INFO: # loops 1 09:39:34:ST3_smx:INFO: # loops 2 09:39:36:ST3_smx:INFO: # loops 3 09:39:38:ST3_smx:INFO: # loops 4 09:39:39:ST3_smx:INFO: Total # of broken channels: 0 09:39:39:ST3_smx:INFO: List of broken channels: [] 09:39:39:ST3_smx:INFO: Total # of broken channels: 0 09:39:39:ST3_smx:INFO: List of broken channels: [] 09:39:40:asictest:INFO: Starting CSA scan - 09:39:41:asictest:INFO: 0, 0.062200 09:39:42:asictest:INFO: 9, 0.140500 09:39:42:asictest:INFO: 18, 0.212700 09:39:43:asictest:INFO: 27, 0.283400 09:39:44:asictest:INFO: 36, 0.348600 09:39:45:asictest:INFO: 45, 0.408000 09:39:45:asictest:INFO: 54, 0.454600 09:39:46:asictest:INFO: 63, 0.481200 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : Microcable TEST_DATE : 2023_11_15-09_38_34 OPERATOR : Oleksandr S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : 0296L020-M000 | side-P | index: (7/8) --------------------------------------- --------------------------------------- ASIC_CONFIG_PARAMETERS HW_ADDR : 0x7 | VERS_NO : 2.2 ASIC_ID : XA-000-08-002-000-004-139-02 | FUSED_ID : 6359364699116554418 IC_TEMP : -0.15 | VDDM : 1101.54 | AUX_INT : 16.57 | CsaBias : 162.98 CONF_FAIL_REG : 0 CSA_BIAS : 15 THR2_GLB : 30 ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122 ADC_Chi2/NDF : 2.80913e-05 / 0 ADC_P0 : 0.00000e+00 ± 1.00000e+00 ADC_P1 : 8.29759e-03 ± 2.49398e-02 ADC_P2 : -7.43315e-06 ± 1.45599e-04 CSA_Chi2/NDF : 1.70871e-04 / 0 CSA_P0 : 5.81583e-02 ± 4.92004e-03 CSA_P1 : 9.70344e-03 ± 3.64830e-04 CSA_P2 : -4.57966e-05 ± 5.56814e-06 --------------------------------------- N_BROKEN_DISC : 0 | N_BROKEN_FAST : [] N_BROKEN_CABLE : 0 LIST_OF_BROKEN_CABLES : [] --------------------------------------- VI_before_Init : ['1.199', '0.3209', '1.800', '0.0606', '1.800', '0.1545', '6.999', '0.6892'] VI_after__Init : ['1.200', '0.3210', '1.800', '0.0605', '1.800', '0.1544', '7.000', '0.6901'] VI_at__the_End : ['1.200', '0.4820', '1.800', '0.0669', '1.800', '0.1719', '7.000', '0.6901'] 09:39:56:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-000-004-139-02//TestDate_2023_11_15-09_38_34/