
XA-000-08-002-000-004-193-07 15.11.23 09:11:43
ADC4

SMX_7

CSA

Calibration
ADC
CSA
Report.txt
09:11:43:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:11:43:ST3_Shared:INFO: -------------------------Microcable------------------------- 09:11:43:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:11:45:smx_tester:INFO: Scanning setup 09:11:45:elinks:INFO: Disabling clock on downlink 0 09:11:45:elinks:INFO: Disabling clock on downlink 1 09:11:45:elinks:INFO: Disabling clock on downlink 2 09:11:45:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:11:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:11:45:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0 09:11:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:11:45:elinks:INFO: Disabling clock on downlink 0 09:11:45:elinks:INFO: Disabling clock on downlink 1 09:11:45:elinks:INFO: Disabling clock on downlink 2 09:11:45:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:11:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:11:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:11:45:elinks:INFO: Disabling clock on downlink 0 09:11:45:elinks:INFO: Disabling clock on downlink 1 09:11:45:elinks:INFO: Disabling clock on downlink 2 09:11:45:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:11:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:11:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:11:45:setup_element:INFO: Scanning clock phase 09:11:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:11:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 09:11:45:setup_element:INFO: Clock phase scan results for group 0, downlink 0 09:11:45:setup_element:INFO: Eye window for uplink 0 : ____________________________________________________XXXXXX______________________ Clock Delay: 14 09:11:45:setup_element:INFO: Setting the clock phase to 14 for group 0, downlink 0 09:11:45:setup_element:INFO: Scanning data phases 09:11:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:11:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 09:11:50:setup_element:INFO: Data phase scan results for group 0, downlink 0 09:11:50:setup_element:INFO: Eye window for uplink 0 : __XXXXX_________________________________ Data delay found: 24 09:11:50:setup_element:INFO: Setting the data phase to 24 for uplink 0 09:11:50:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 0 Uplinks: [0] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 14 Window Length: 74 Eye Windows: Uplink 0: ____________________________________________________XXXXXX______________________ Data phase characteristics: Uplink 0: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ ] 09:11:50:setup_element:INFO: Beginning SMX ASICs map scan 09:11:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:11:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 09:11:50:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 09:11:50:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 09:11:50:uplink:INFO: Setting uplinks mask [0] 09:11:52:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0 09:11:53:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 0 Uplinks: [0] ASICs Map: ASIC address 0x7: (ASIC uplink, uplink): (0, 0) Clock Phase Characteristic: Optimal Phase: 14 Window Length: 74 Eye Windows: Uplink 0: ____________________________________________________XXXXXX______________________ Data phase characteristics: Uplink 0: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ 09:11:53:setup_element:INFO: Performing Elink synchronization 09:11:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:11:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 09:11:53:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 09:11:53:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 09:11:53:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0 09:11:53:uplink:INFO: Enabling uplinks [0] 09:11:53:ST3_emu:INFO: Number of chips: 1 09:11:53:ST3_emu:INFO: Chip address: 0x7 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7 09:11:54:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values ============== Starting SMX ID burn ============== 09:11:57:asictest:WARNING: Fused ID is not zero 6359364699116555287 09:11:58:asictest:INFO: Starting ADC calibration/scan 09:12:04:asictest:INFO: 0, 6, 0.000000 09:12:09:asictest:INFO: 1, 46, 0.300000 09:12:15:asictest:INFO: 2, 82, 0.600000 09:12:21:asictest:INFO: 3, 129, 0.900000 09:12:27:asictest:INFO: 4, 178, 1.200000 09:12:32:asictest:INFO: 5, 195, 1.300000 09:12:38:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV] 09:12:38:asictest:INFO: 22.00 1201.07 840.69 30.73 09:12:40:ST3_smx:INFO: chip: 0-7 21.997587 C 1195.270400 mV 09:12:40:ST3_smx:INFO: # loops 0 09:12:41:ST3_smx:INFO: # loops 1 09:12:43:ST3_smx:INFO: # loops 2 09:12:44:ST3_smx:INFO: # loops 3 09:12:46:ST3_smx:INFO: # loops 4 09:12:48:ST3_smx:INFO: Total # of broken channels: 0 09:12:48:ST3_smx:INFO: List of broken channels: [] 09:12:48:ST3_smx:INFO: Total # of broken channels: 0 09:12:48:ST3_smx:INFO: List of broken channels: [] 09:12:49:asictest:INFO: Starting CSA scan - 09:12:49:asictest:INFO: 0, 0.064100 09:12:50:asictest:INFO: 9, 0.143800 09:12:51:asictest:INFO: 18, 0.216400 09:12:51:asictest:INFO: 27, 0.285300 09:12:52:asictest:INFO: 36, 0.353200 09:12:52:asictest:INFO: 45, 0.419800 09:12:53:asictest:INFO: 54, 0.478300 09:12:54:asictest:INFO: 63, 0.523200 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : Microcable TEST_DATE : 2023_11_15-09_11_43 OPERATOR : Oleksandr S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : 0296L020-M000 | side-N | index: (6/8) --------------------------------------- --------------------------------------- ASIC_CONFIG_PARAMETERS HW_ADDR : 0x7 | VERS_NO : 2.2 ASIC_ID : XA-000-08-002-000-004-193-07 | FUSED_ID : 6359364699116555287 IC_TEMP : 15.30 | VDDM : 1130.80 | AUX_INT : 0.00 | CsaBias : 151.93 CONF_FAIL_REG : 0 CSA_BIAS : 15 THR2_GLB : 30 ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122 ADC_Chi2/NDF : 4.40220e-05 / 1 ADC_P0 : 0.00000e+00 ± 6.63490e-03 ADC_P1 : 7.70413e-03 ± 1.11326e-04 ADC_P2 : -5.37396e-06 ± 6.45093e-07 CSA_Chi2/NDF : 5.96986e-05 / 1 CSA_P0 : 6.33375e-02 ± 2.90814e-03 CSA_P1 : 9.06343e-03 ± 2.15644e-04 CSA_P2 : -2.70356e-05 ± 3.29122e-06 --------------------------------------- N_BROKEN_DISC : 0 | N_BROKEN_FAST : [] N_BROKEN_CABLE : 0 LIST_OF_BROKEN_CABLES : [] --------------------------------------- VI_before_Init : ['1.199', '0.3556', '1.800', '0.0787', '1.801', '0.1423', '6.999', '0.6882'] VI_after__Init : ['1.200', '0.3558', '1.800', '0.0785', '1.800', '0.1426', '7.000', '0.6890'] VI_at__the_End : ['1.200', '0.5230', '1.800', '0.0717', '1.800', '0.1634', '7.000', '0.6891'] 09:12:58:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-000-004-193-07//TestDate_2023_11_15-09_11_43/