
XA-000-08-002-000-005-053-12 17.10.23 11:26:35
ADC4

SMX_7

CSA

Calibration
ADC
CSA
Report.txt
11:26:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:26:35:ST3_Shared:INFO: -------------------------Microcable------------------------- 11:26:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:26:37:smx_tester:INFO: Scanning setup 11:26:37:elinks:INFO: Disabling clock on downlink 0 11:26:37:elinks:INFO: Disabling clock on downlink 1 11:26:37:elinks:INFO: Disabling clock on downlink 2 11:26:37:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:26:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 11:26:37:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0 11:26:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:26:37:elinks:INFO: Disabling clock on downlink 0 11:26:37:elinks:INFO: Disabling clock on downlink 1 11:26:37:elinks:INFO: Disabling clock on downlink 2 11:26:37:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:26:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:26:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:26:37:elinks:INFO: Disabling clock on downlink 0 11:26:37:elinks:INFO: Disabling clock on downlink 1 11:26:37:elinks:INFO: Disabling clock on downlink 2 11:26:37:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:26:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:26:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:26:37:setup_element:INFO: Scanning clock phase 11:26:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 11:26:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 11:26:37:setup_element:INFO: Clock phase scan results for group 0, downlink 0 11:26:37:setup_element:INFO: Eye window for uplink 0 : _____________________________________________________XXXXXX_____________________ Clock Delay: 15 11:26:37:setup_element:INFO: Setting the clock phase to 15 for group 0, downlink 0 11:26:37:setup_element:INFO: Scanning data phases 11:26:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 11:26:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 11:26:42:setup_element:INFO: Data phase scan results for group 0, downlink 0 11:26:42:setup_element:INFO: Eye window for uplink 0 : _____XXXX_______________________________ Data delay found: 26 11:26:42:setup_element:INFO: Setting the data phase to 26 for uplink 0 11:26:42:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 0 Uplinks: [0] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 15 Window Length: 74 Eye Windows: Uplink 0: _____________________________________________________XXXXXX_____________________ Data phase characteristics: Uplink 0: Optimal Phase: 26 Window Length: 36 Eye Window: _____XXXX_______________________________ ] 11:26:43:setup_element:INFO: Beginning SMX ASICs map scan 11:26:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 11:26:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 11:26:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 11:26:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 11:26:43:uplink:INFO: Setting uplinks mask [0] 11:26:44:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0 11:26:45:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 0 Uplinks: [0] ASICs Map: ASIC address 0x7: (ASIC uplink, uplink): (0, 0) Clock Phase Characteristic: Optimal Phase: 15 Window Length: 74 Eye Windows: Uplink 0: _____________________________________________________XXXXXX_____________________ Data phase characteristics: Uplink 0: Optimal Phase: 26 Window Length: 36 Eye Window: _____XXXX_______________________________ 11:26:45:setup_element:INFO: Performing Elink synchronization 11:26:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 11:26:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 11:26:45:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 11:26:45:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 11:26:45:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0 11:26:45:uplink:INFO: Enabling uplinks [0] 11:26:45:ST3_emu:INFO: Number of chips: 1 11:26:45:ST3_emu:INFO: Chip address: 0x7 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7 11:26:46:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values ============== Starting SMX ID burn ============== 11:26:50:asictest:WARNING: Fused ID is not zero 6359364699116557148 11:26:50:asictest:INFO: Starting ADC calibration/scan 11:26:56:asictest:INFO: 0, 1, 0.000000 11:27:02:asictest:INFO: 1, 45, 0.300000 11:27:08:asictest:INFO: 2, 86, 0.600000 11:27:13:asictest:INFO: 3, 133, 0.900000 11:27:19:asictest:INFO: 4, 183, 1.200000 11:27:25:asictest:INFO: 5, 199, 1.300000 11:27:30:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV] 11:27:31:asictest:INFO: 21.74 1197.98 869.39 14.56 11:27:32:ST3_smx:INFO: chip: 0-7 21.744270 C 1197.984472 mV 11:27:32:ST3_smx:INFO: # loops 0 11:27:34:ST3_smx:INFO: # loops 1 11:27:35:ST3_smx:INFO: # loops 2 11:27:37:ST3_smx:INFO: # loops 3 11:27:39:ST3_smx:INFO: # loops 4 11:27:41:ST3_smx:INFO: Total # of broken channels: 0 11:27:41:ST3_smx:INFO: List of broken channels: [] 11:27:41:ST3_smx:INFO: Total # of broken channels: 0 11:27:41:ST3_smx:INFO: List of broken channels: [] 11:27:42:asictest:INFO: Starting CSA scan - 11:27:42:asictest:INFO: 0, 0.065000 11:27:43:asictest:INFO: 9, 0.148800 11:27:44:asictest:INFO: 18, 0.225000 11:27:44:asictest:INFO: 27, 0.296600 11:27:45:asictest:INFO: 36, 0.364700 11:27:45:asictest:INFO: 45, 0.435000 11:27:46:asictest:INFO: 54, 0.499200 11:27:47:asictest:INFO: 63, 0.545100 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : Microcable TEST_DATE : 2023_10_17-11_26_35 OPERATOR : Olga B.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : 0319L020-M003 | side-N | index: (3/8) | Spare --------------------------------------- --------------------------------------- ASIC_CONFIG_PARAMETERS HW_ADDR : 0x7 | VERS_NO : 2.2 ASIC_ID : XA-000-08-002-000-005-053-12 | FUSED_ID : 6359364699116557148 IC_TEMP : 15.22 | VDDM : 1126.92 | AUX_INT : 0.00 | CsaBias : 179.80 CONF_FAIL_REG : 0 CSA_BIAS : 15 THR2_GLB : 30 ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122 ADC_Chi2/NDF : 2.94820e-05 / 1 ADC_P0 : 0.00000e+00 ± 5.42973e-03 ADC_P1 : 7.28926e-03 ± 8.95855e-05 ADC_P2 : -3.88420e-06 ± 5.07651e-07 CSA_Chi2/NDF : 7.59719e-05 / 1 CSA_P0 : 6.49833e-02 ± 3.28065e-03 CSA_P1 : 9.38902e-03 ± 2.43266e-04 CSA_P2 : -2.70282e-05 ± 3.71280e-06 --------------------------------------- N_BROKEN_DISC : 0 | N_BROKEN_FAST : [] N_BROKEN_CABLE : 0 LIST_OF_BROKEN_CABLES : [] --------------------------------------- VI_before_Init : ['1.199', '0.2167', '1.800', '0.1127', '1.800', '0.1458', '7.000', '0.6845'] VI_after__Init : ['1.200', '0.2176', '1.800', '0.1121', '1.800', '0.1430', '7.000', '0.6849'] VI_at__the_End : ['1.200', '0.5450', '1.800', '0.0746', '1.800', '0.1658', '7.000', '0.6852'] 11:31:12:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-000-005-053-12//TestDate_2023_10_17-11_26_35/