XA-000-08-002-000-005-079-00    31.01.24 13:30:48

ADC4
cADCscan.png
SMX_7
SMX_7.png
CSA
cCSAscan.png
Calibration
ADC
p0.svg
p1.svg
CSA
p0.svg
p2.svg
p1.svg
Report.txt
            13:30:48:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:30:48:ST3_Shared:INFO:	-------------------------Microcable-------------------------
13:30:48:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:30:49:smx_tester:INFO:	Scanning setup
13:30:49:elinks:INFO:	Disabling clock on downlink 0
13:30:49:elinks:INFO:	Disabling clock on downlink 1
13:30:49:elinks:INFO:	Disabling clock on downlink 2
13:30:49:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:30:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:30:49:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 0
13:30:49:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:30:49:elinks:INFO:	Disabling clock on downlink 0
13:30:49:elinks:INFO:	Disabling clock on downlink 1
13:30:49:elinks:INFO:	Disabling clock on downlink 2
13:30:49:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:30:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:30:50:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:30:50:elinks:INFO:	Disabling clock on downlink 0
13:30:50:elinks:INFO:	Disabling clock on downlink 1
13:30:50:elinks:INFO:	Disabling clock on downlink 2
13:30:50:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:30:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:30:50:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:30:50:setup_element:INFO:	Scanning clock phase
13:30:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:30:50:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:30:50:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
13:30:50:setup_element:INFO:	Eye window for uplink 0 : ____________________________________________________XXXXXX______________________
Clock Delay: 14
13:30:50:setup_element:INFO:	Setting the clock phase to 14 for group 0, downlink 0
13:30:50:setup_element:INFO:	Scanning data phases
13:30:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:30:50:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:30:55:setup_element:INFO:	Data phase scan results for group 0, downlink 0
13:30:55:setup_element:INFO:	Eye window for uplink 0 : ______XXXX______________________________
Data delay found: 27
13:30:55:setup_element:INFO:	Setting the data phase to 27 for uplink 0
13:30:55:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 14
    Window Length: 74
    Eye Windows:
      Uplink  0: ____________________________________________________XXXXXX______________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 27
      Window Length: 36
      Eye Window: ______XXXX______________________________
]
13:30:55:setup_element:INFO:	Beginning SMX ASICs map scan
13:30:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:30:55:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:30:55:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
13:30:55:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
13:30:55:uplink:INFO:	Setting uplinks mask [0]
13:30:56:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 0
13:30:58:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map:
    ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
  Clock Phase Characteristic:
    Optimal Phase: 14
    Window Length: 74
    Eye Windows:
      Uplink  0: ____________________________________________________XXXXXX______________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 27
      Window Length: 36
      Eye Window: ______XXXX______________________________

13:30:58:setup_element:INFO:	Performing Elink synchronization
13:30:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:30:58:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:30:58:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
13:30:58:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
13:30:58:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
13:30:58:uplink:INFO:	Enabling uplinks [0]
13:30:58:ST3_emu:INFO:	Number of chips: 1
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   7  |   [0]   |  0  |  0  |     [0]      |       [(0, 0)]     
13:30:59:ST3_smx:INFO:	Configuring SMX
 ============== Starting SMX ID burn ==============
13:31:02:asictest:WARNING:	Fused ID is not zero 6359364699116557552
 ============== Starting ADC calibration ==============
13:31:09:asictest:INFO:	0,	0,	0.000000
13:31:14:asictest:INFO:	1,	46,	0.300000
13:31:20:asictest:INFO:	2,	92,	0.600000
13:31:26:asictest:INFO:	3,	144,	0.900000
13:31:32:asictest:INFO:	4,	197,	1.200000
13:31:37:asictest:INFO:	5,	217,	1.300000
13:31:44:ST3_smx:INFO:	chip: 0-7 	 25.145767 C 	 1202.027593 mV
13:31:44:ST3_smx:INFO:		Electrons
13:31:44:ST3_smx:INFO:	# loops 0
13:31:45:ST3_smx:INFO:	# loops 1
13:31:47:ST3_smx:INFO:	# loops 2
13:31:49:ST3_smx:INFO:	# loops 3
13:31:50:ST3_smx:INFO:	# loops 4
13:31:52:ST3_smx:INFO:	Total # of broken channels: 0
13:31:52:ST3_smx:INFO:	List of broken channels: []
13:31:52:ST3_smx:INFO:	Total # of broken channels: 0
13:31:52:ST3_smx:INFO:	List of broken channels: []
13:31:53:asictest:INFO:	 Starting CSA scan -
0 0.0277
13:31:54:asictest:INFO:	0,	0.027700
9 0.1124
13:31:55:asictest:INFO:	9,	0.112400
18 0.1924
13:31:55:asictest:INFO:	18,	0.192400
27 0.2721
13:31:56:asictest:INFO:	27,	0.272100
36 0.3456
13:31:56:asictest:INFO:	36,	0.345600
45 0.4118
13:31:57:asictest:INFO:	45,	0.411800
54 0.4615
13:31:58:asictest:INFO:	54,	0.461500
63 0.4894
13:31:58:asictest:INFO:	63,	0.489400
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2024_01_31-13_30_48
OPERATOR  : Robert V.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 0346L027-M001 | side-N | index: (1/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
  HW_ADDR : 0x7 | VERS_NO : 2.2
  ASIC_ID : XA-000-08-002-000-005-079-00 | FUSED_ID : 6359364699116557552
  IC_TEMP :   25.15 | VDDM :  984.00 | AUX_INT :    0.00 | CsaBias :   81.61
  CONF_FAIL_REG : 0
  CSA_BIAS : 15
  THR2_GLB : 30
  ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
  ADC_Chi2/NDF : 4.46905e-05 / 1
  ADC_P0  : 0.00000e+00 ± 6.68509e-03
  ADC_P1  : 6.84810e-03 ± 1.00977e-04
  ADC_P2  : -3.92553e-06 ± 5.27033e-07
  CSA_Chi2/NDF : 2.91777e-04 / 1
  CSA_P0  : 2.17542e-02 ± 6.42924e-03
  CSA_P1  : 1.08272e-02 ± 4.76740e-04
  CSA_P2  : -5.19915e-05 ± 7.27614e-06
---------------------------------------
N_BROKEN_DISC :  0 | N_BROKEN_FAST :  []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.1900', '1.800', '0.0675', '1.800', '0.0978', '7.001', '0.6795']
VI_after__Init : ['1.200', '0.1900', '1.800', '0.0676', '1.800', '0.1355', '7.000', '0.6809']
VI_at__the_End : ['1.200', '0.4823', '1.800', '0.0737', '1.800', '0.1568', '7.000', '0.6821']
13:33:21:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-000-005-079-00//TestDate_2024_01_31-13_30_48/