XA-000-08-002-000-005-167-01 20.07.23 09:44:02
ADC4
SMX_7
CSA
Calibration
ADC
CSA
Info
09:44:02:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:44:02:ST3_Shared:INFO: -------------------------Microcable-------------------------
09:44:02:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:44:04:smx_tester:INFO: Scanning setup
09:44:04:elinks:INFO: Disabling clock on downlink 0
09:44:04:elinks:INFO: Disabling clock on downlink 1
09:44:04:elinks:INFO: Disabling clock on downlink 2
09:44:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:44:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:44:04:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
09:44:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:44:04:elinks:INFO: Disabling clock on downlink 0
09:44:05:elinks:INFO: Disabling clock on downlink 1
09:44:05:elinks:INFO: Disabling clock on downlink 2
09:44:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:44:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:44:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:44:05:elinks:INFO: Disabling clock on downlink 0
09:44:05:elinks:INFO: Disabling clock on downlink 1
09:44:05:elinks:INFO: Disabling clock on downlink 2
09:44:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:44:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:44:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:44:05:setup_element:INFO: Scanning clock phase
09:44:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:44:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:44:05:setup_element:INFO: Clock phase scan results for group 0, downlink 0
09:44:05:setup_element:INFO: Eye window for uplink 0 : ______________________________________________________XXXXXX____________________
Clock Delay: 16
09:44:05:setup_element:INFO: Setting the clock phase to 16 for group 0, downlink 0
09:44:05:setup_element:INFO: Scanning data phases
09:44:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:44:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:44:10:setup_element:INFO: Data phase scan results for group 0, downlink 0
09:44:10:setup_element:INFO: Eye window for uplink 0 : ____XXXX________________________________
Data delay found: 25
09:44:10:setup_element:INFO: Setting the data phase to 25 for uplink 0
09:44:10:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 16
Window Length: 74
Eye Windows:
Uplink 0: ______________________________________________________XXXXXX____________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 25
Window Length: 36
Eye Window: ____XXXX________________________________
]
09:44:10:setup_element:INFO: Beginning SMX ASICs map scan
09:44:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:44:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:44:10:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
09:44:10:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
09:44:10:uplink:INFO: Setting uplinks mask [0]
09:44:11:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0
09:44:13:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map:
ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
Clock Phase Characteristic:
Optimal Phase: 16
Window Length: 74
Eye Windows:
Uplink 0: ______________________________________________________XXXXXX____________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 25
Window Length: 36
Eye Window: ____XXXX________________________________
09:44:13:setup_element:INFO: Performing Elink synchronization
09:44:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:44:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:44:13:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
09:44:13:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
09:44:13:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
09:44:13:uplink:INFO: Enabling uplinks [0]
09:44:13:ST3_emu:INFO: Number of chips: 1
09:44:13:ST3_emu:INFO: Chip address: 0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
09:44:14:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
============== Starting SMX ID burn ==============
09:44:18:asictest:WARNING: Fused ID is not zero 6359364699116558961
09:44:19:asictest:INFO: Starting ADC calibration/scan
09:44:24:asictest:INFO: 0, 0, 0.000000
09:44:30:asictest:INFO: 1, 47, 0.300000
09:44:36:asictest:INFO: 2, 95, 0.600000
09:44:42:asictest:INFO: 3, 149, 0.900000
09:44:48:asictest:INFO: 4, 208, 1.200000
09:44:53:asictest:INFO: 5, 229, 1.300000
09:44:59:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV]
09:44:59:asictest:INFO: 14.28 1205.36 874.36 0.00
09:45:01:ST3_smx:INFO: chip: 0-7 14.277786 C 1205.362562 mV
09:45:01:ST3_smx:INFO: # loops 0
09:45:02:ST3_smx:INFO: # loops 1
09:45:04:ST3_smx:INFO: # loops 2
09:45:06:ST3_smx:INFO: # loops 3
09:45:07:ST3_smx:INFO: # loops 4
09:45:09:ST3_smx:INFO: Total # of broken channels: 0
09:45:09:ST3_smx:INFO: List of broken channels: []
09:45:09:ST3_smx:INFO: Total # of broken channels: 0
09:45:09:ST3_smx:INFO: List of broken channels: []
09:45:11:asictest:INFO: Starting CSA scan -
09:45:11:asictest:INFO: 0, 0.063000
09:45:12:asictest:INFO: 9, 0.140700
09:45:13:asictest:INFO: 18, 0.210800
09:45:13:asictest:INFO: 27, 0.276700
09:45:14:asictest:INFO: 36, 0.342700
09:45:15:asictest:INFO: 45, 0.403000
09:45:15:asictest:INFO: 54, 0.455500
09:45:16:asictest:INFO: 63, 0.494300
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_07_20-09_44_02
OPERATOR : Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID : 0002L099-M002 | side-N | index: (6/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
HW_ADDR : 0x7 | VERS_NO : 2.2
ASIC_ID : XA-000-08-002-000-005-167-01 | FUSED_ID : 6359364699116558961
IC_TEMP : 11.42 | VDDM : 1097.77 | AUX_INT : 0.00 | CsaBias : 126.50
CONF_FAIL_REG : 0
CSA_BIAS : 15
THR2_GLB : 30
ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
ADC_Chi2/NDF : 4.22242e-06 / 1
ADC_P0 : 0.00000e+00 ± 2.05485e-03
ADC_P1 : 6.74690e-03 ± 2.91259e-05
ADC_P2 : -4.68715e-06 ± 1.43953e-07
CSA_Chi2/NDF : 5.98215e-05 / 1
CSA_P0 : 6.18042e-02 ± 2.91114e-03
CSA_P1 : 8.96766e-03 ± 2.15866e-04
CSA_P2 : -3.24148e-05 ± 3.29461e-06
---------------------------------------
N_BROKEN_DISC : 0 | N_BROKEN_FAST : []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.2208', '1.800', '0.1074', '1.801', '0.1693', '7.000', '0.6901']
VI_after__Init : ['1.200', '0.2224', '1.800', '0.1054', '1.800', '0.1668', '7.000', '0.6901']
VI_at__the_End : ['1.200', '0.4970', '1.800', '0.0646', '1.800', '0.1914', '7.000', '0.6899']
09:46:02:ST3_Shared:INFO: /home/cbm/public_html/Test_LogDir/Microcable/XA-000-08-002-000-005-167-01//TestDate_2023_07_20-09_44_02/
Comment
02Tr-6-PA
N-Side