XA-000-08-002-000-005-170-01 20.07.23 09:46:55
ADC4
SMX_7
CSA
Calibration
ADC
CSA
Info
09:46:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:46:55:ST3_Shared:INFO: -------------------------Microcable-------------------------
09:46:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:46:58:smx_tester:INFO: Scanning setup
09:46:58:elinks:INFO: Disabling clock on downlink 0
09:46:58:elinks:INFO: Disabling clock on downlink 1
09:46:58:elinks:INFO: Disabling clock on downlink 2
09:46:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:46:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:46:58:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
09:46:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:46:58:elinks:INFO: Disabling clock on downlink 0
09:46:58:elinks:INFO: Disabling clock on downlink 1
09:46:58:elinks:INFO: Disabling clock on downlink 2
09:46:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:46:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:46:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:46:58:elinks:INFO: Disabling clock on downlink 0
09:46:58:elinks:INFO: Disabling clock on downlink 1
09:46:58:elinks:INFO: Disabling clock on downlink 2
09:46:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:46:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:46:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:46:58:setup_element:INFO: Scanning clock phase
09:46:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:46:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:46:59:setup_element:INFO: Clock phase scan results for group 0, downlink 0
09:46:59:setup_element:INFO: Eye window for uplink 0 : _____________________________________________________XXXXXXX____________________
Clock Delay: 16
09:46:59:setup_element:INFO: Setting the clock phase to 16 for group 0, downlink 0
09:46:59:setup_element:INFO: Scanning data phases
09:46:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:46:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:47:04:setup_element:INFO: Data phase scan results for group 0, downlink 0
09:47:04:setup_element:INFO: Eye window for uplink 0 : ____XXX_________________________________
Data delay found: 25
09:47:04:setup_element:INFO: Setting the data phase to 25 for uplink 0
09:47:04:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 16
Window Length: 73
Eye Windows:
Uplink 0: _____________________________________________________XXXXXXX____________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 25
Window Length: 37
Eye Window: ____XXX_________________________________
]
09:47:04:setup_element:INFO: Beginning SMX ASICs map scan
09:47:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:47:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:47:04:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
09:47:04:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
09:47:04:uplink:INFO: Setting uplinks mask [0]
09:47:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0
09:47:06:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map:
ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
Clock Phase Characteristic:
Optimal Phase: 16
Window Length: 73
Eye Windows:
Uplink 0: _____________________________________________________XXXXXXX____________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 25
Window Length: 37
Eye Window: ____XXX_________________________________
09:47:06:setup_element:INFO: Performing Elink synchronization
09:47:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:47:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:47:06:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
09:47:06:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
09:47:07:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
09:47:07:uplink:INFO: Enabling uplinks [0]
09:47:07:ST3_emu:INFO: Number of chips: 1
09:47:07:ST3_emu:INFO: Chip address: 0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
09:47:08:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
============== Starting SMX ID burn ==============
09:47:11:asictest:WARNING: Fused ID is not zero 6359364699116559009
09:47:12:asictest:INFO: Starting ADC calibration/scan
09:47:18:asictest:INFO: 0, 0, 0.000000
09:47:24:asictest:INFO: 1, 40, 0.300000
09:47:30:asictest:INFO: 2, 80, 0.600000
09:47:35:asictest:INFO: 3, 126, 0.900000
09:47:41:asictest:INFO: 4, 173, 1.200000
09:47:47:asictest:INFO: 5, 189, 1.300000
09:47:52:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV]
09:47:52:asictest:INFO: 25.10 1201.62 826.64 0.00
09:47:54:ST3_smx:INFO: chip: 0-7 25.102973 C 1201.619358 mV
09:47:54:ST3_smx:INFO: # loops 0
09:47:56:ST3_smx:INFO: # loops 1
09:47:57:ST3_smx:INFO: # loops 2
09:47:59:ST3_smx:INFO: # loops 3
09:48:00:ST3_smx:INFO: # loops 4
09:48:02:ST3_smx:INFO: Total # of broken channels: 0
09:48:02:ST3_smx:INFO: List of broken channels: []
09:48:02:ST3_smx:INFO: Total # of broken channels: 0
09:48:02:ST3_smx:INFO: List of broken channels: []
09:48:03:asictest:INFO: Starting CSA scan -
09:48:04:asictest:INFO: 0, 0.066200
09:48:05:asictest:INFO: 9, 0.151800
09:48:05:asictest:INFO: 18, 0.230200
09:48:06:asictest:INFO: 27, 0.305100
09:48:07:asictest:INFO: 36, 0.379900
09:48:08:asictest:INFO: 45, 0.448400
09:48:08:asictest:INFO: 54, 0.508800
09:48:09:asictest:INFO: 63, 0.552600
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_07_20-09_46_55
OPERATOR : Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID : 0002L099-M002 | side-N | index: (7/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
HW_ADDR : 0x7 | VERS_NO : 2.2
ASIC_ID : XA-000-08-002-000-005-170-01 | FUSED_ID : 6359364699116559009
IC_TEMP : 18.20 | VDDM : 1128.27 | AUX_INT : 0.00 | CsaBias : 116.46
CONF_FAIL_REG : 0
CSA_BIAS : 15
THR2_GLB : 30
ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
ADC_Chi2/NDF : 7.88792e-05 / 1
ADC_P0 : 0.00000e+00 ± 8.88140e-03
ADC_P1 : 7.84144e-03 ± 1.54337e-04
ADC_P2 : -5.17726e-06 ± 9.21811e-07
CSA_Chi2/NDF : 9.31690e-05 / 1
CSA_P0 : 6.42167e-02 ± 3.63304e-03
CSA_P1 : 9.99907e-03 ± 2.69396e-04
CSA_P2 : -3.44356e-05 ± 4.11160e-06
---------------------------------------
N_BROKEN_DISC : 0 | N_BROKEN_FAST : []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.2027', '1.799', '0.0656', '1.801', '0.1515', '7.000', '0.6900']
VI_after__Init : ['1.200', '0.2057', '1.800', '0.0651', '1.800', '0.1500', '7.000', '0.6898']
VI_at__the_End : ['1.200', '0.5520', '1.800', '0.0754', '1.800', '0.1654', '7.000', '0.6898']
09:48:21:ST3_Shared:INFO: /home/cbm/public_html/Test_LogDir/Microcable/XA-000-08-002-000-005-170-01//TestDate_2023_07_20-09_46_55/
Comment
02Tr-6-PA
N-Side