XA-000-08-002-000-005-175-01 20.07.23 09:41:36
ADC4
SMX_7
CSA
Calibration
ADC
CSA
Info
09:41:36:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:41:36:ST3_Shared:INFO: -------------------------Microcable-------------------------
09:41:36:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:41:38:smx_tester:INFO: Scanning setup
09:41:38:elinks:INFO: Disabling clock on downlink 0
09:41:38:elinks:INFO: Disabling clock on downlink 1
09:41:38:elinks:INFO: Disabling clock on downlink 2
09:41:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:41:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:41:38:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
09:41:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:41:38:elinks:INFO: Disabling clock on downlink 0
09:41:38:elinks:INFO: Disabling clock on downlink 1
09:41:38:elinks:INFO: Disabling clock on downlink 2
09:41:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:41:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:41:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:41:39:elinks:INFO: Disabling clock on downlink 0
09:41:39:elinks:INFO: Disabling clock on downlink 1
09:41:39:elinks:INFO: Disabling clock on downlink 2
09:41:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:41:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:41:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:41:39:setup_element:INFO: Scanning clock phase
09:41:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:41:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:41:39:setup_element:INFO: Clock phase scan results for group 0, downlink 0
09:41:39:setup_element:INFO: Eye window for uplink 0 : _____________________________________________________XXXXXXX____________________
Clock Delay: 16
09:41:39:setup_element:INFO: Setting the clock phase to 16 for group 0, downlink 0
09:41:39:setup_element:INFO: Scanning data phases
09:41:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:41:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:41:44:setup_element:INFO: Data phase scan results for group 0, downlink 0
09:41:44:setup_element:INFO: Eye window for uplink 0 : _____XXXX_______________________________
Data delay found: 26
09:41:44:setup_element:INFO: Setting the data phase to 26 for uplink 0
09:41:44:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 16
Window Length: 73
Eye Windows:
Uplink 0: _____________________________________________________XXXXXXX____________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 26
Window Length: 36
Eye Window: _____XXXX_______________________________
]
09:41:44:setup_element:INFO: Beginning SMX ASICs map scan
09:41:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:41:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:41:44:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
09:41:44:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
09:41:44:uplink:INFO: Setting uplinks mask [0]
09:41:45:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0
09:41:47:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map:
ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
Clock Phase Characteristic:
Optimal Phase: 16
Window Length: 73
Eye Windows:
Uplink 0: _____________________________________________________XXXXXXX____________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 26
Window Length: 36
Eye Window: _____XXXX_______________________________
09:41:47:setup_element:INFO: Performing Elink synchronization
09:41:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:41:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:41:47:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
09:41:47:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
09:41:47:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
09:41:47:uplink:INFO: Enabling uplinks [0]
09:41:47:ST3_emu:INFO: Number of chips: 1
09:41:47:ST3_emu:INFO: Chip address: 0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
09:41:48:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
============== Starting SMX ID burn ==============
09:41:52:asictest:WARNING: Fused ID is not zero 6359364699116559089
09:41:53:asictest:INFO: Starting ADC calibration/scan
09:41:59:asictest:INFO: 0, 0, 0.000000
09:42:04:asictest:INFO: 1, 45, 0.300000
09:42:10:asictest:INFO: 2, 89, 0.599000
09:42:16:asictest:INFO: 3, 141, 0.900000
09:42:22:asictest:INFO: 4, 194, 1.200000
09:42:27:asictest:INFO: 5, 213, 1.300000
09:42:33:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV]
09:42:33:asictest:INFO: 20.05 1199.65 848.03 0.00
09:42:35:ST3_smx:INFO: chip: 0-7 20.047054 C 1199.649371 mV
09:42:35:ST3_smx:INFO: # loops 0
09:42:36:ST3_smx:INFO: # loops 1
09:42:38:ST3_smx:INFO: # loops 2
09:42:40:ST3_smx:INFO: # loops 3
09:42:42:ST3_smx:INFO: # loops 4
09:42:43:ST3_smx:INFO: Total # of broken channels: 0
09:42:43:ST3_smx:INFO: List of broken channels: []
09:42:43:ST3_smx:INFO: Total # of broken channels: 0
09:42:43:ST3_smx:INFO: List of broken channels: []
09:42:45:asictest:INFO: Starting CSA scan -
09:42:46:asictest:INFO: 0, 0.065200
09:42:46:asictest:INFO: 9, 0.146000
09:42:47:asictest:INFO: 18, 0.220100
09:42:47:asictest:INFO: 27, 0.290700
09:42:48:asictest:INFO: 36, 0.362000
09:42:49:asictest:INFO: 45, 0.427300
09:42:49:asictest:INFO: 54, 0.484900
09:42:50:asictest:INFO: 63, 0.526400
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_07_20-09_41_36
OPERATOR : Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID : 0002L099-M002 | side-N | index: (5/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
HW_ADDR : 0x7 | VERS_NO : 2.2
ASIC_ID : XA-000-08-002-000-005-175-01 | FUSED_ID : 6359364699116559089
IC_TEMP : 20.05 | VDDM : 1091.98 | AUX_INT : 0.00 | CsaBias : 112.04
CONF_FAIL_REG : 0
CSA_BIAS : 15
THR2_GLB : 30
ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
ADC_Chi2/NDF : 7.38298e-05 / 1
ADC_P0 : 0.00000e+00 ± 8.59242e-03
ADC_P1 : 7.07608e-03 ± 1.32127e-04
ADC_P2 : -4.59957e-06 ± 7.01332e-07
CSA_Chi2/NDF : 9.23681e-05 / 1
CSA_P0 : 6.32667e-02 ± 3.61739e-03
CSA_P1 : 9.43571e-03 ± 2.68236e-04
CSA_P2 : -3.18636e-05 ± 4.09389e-06
---------------------------------------
N_BROKEN_DISC : 0 | N_BROKEN_FAST : []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.3646', '1.799', '0.1100', '1.800', '0.1628', '7.000', '0.6893']
VI_after__Init : ['1.200', '0.3658', '1.800', '0.1079', '1.800', '0.1623', '7.000', '0.6899']
VI_at__the_End : ['1.200', '0.5252', '1.800', '0.0724', '1.800', '0.1688', '7.000', '0.6901']
09:43:09:ST3_Shared:INFO: /home/cbm/public_html/Test_LogDir/Microcable/XA-000-08-002-000-005-175-01//TestDate_2023_07_20-09_41_36/
Comment
02Tr-6-PA
N-Side