XA-000-08-002-000-006-035-05 21.11.23 13:11:43
ADC4
SMX_7
CSA
Calibration
ADC
CSA
Info
13:11:43:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:11:43:ST3_Shared:INFO: -------------------------Microcable-------------------------
13:11:43:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:11:45:smx_tester:INFO: Scanning setup
13:11:45:elinks:INFO: Disabling clock on downlink 0
13:11:45:elinks:INFO: Disabling clock on downlink 1
13:11:45:elinks:INFO: Disabling clock on downlink 2
13:11:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:11:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:11:45:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
13:11:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:11:45:elinks:INFO: Disabling clock on downlink 0
13:11:45:elinks:INFO: Disabling clock on downlink 1
13:11:45:elinks:INFO: Disabling clock on downlink 2
13:11:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:11:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:11:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:11:45:elinks:INFO: Disabling clock on downlink 0
13:11:45:elinks:INFO: Disabling clock on downlink 1
13:11:45:elinks:INFO: Disabling clock on downlink 2
13:11:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:11:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:11:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:11:45:setup_element:INFO: Scanning clock phase
13:11:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:11:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:11:45:setup_element:INFO: Clock phase scan results for group 0, downlink 0
13:11:45:setup_element:INFO: Eye window for uplink 0 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:11:45:setup_element:INFO: Setting the clock phase to 31 for group 0, downlink 0
13:11:45:setup_element:INFO: Scanning data phases
13:11:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:11:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:11:50:setup_element:INFO: Data phase scan results for group 0, downlink 0
13:11:50:setup_element:INFO: Eye window for uplink 0 : _________________XXXXXXX________________
Data delay found: 0
13:11:50:setup_element:INFO: Setting the data phase to 0 for uplink 0
13:11:50:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 31
Window Length: 72
Eye Windows:
Uplink 0: ____________________________________________________________________XXXXXXXX____
Data phase characteristics:
Uplink 0:
Optimal Phase: 0
Window Length: 33
Eye Window: _________________XXXXXXX________________
]
13:11:50:setup_element:INFO: Beginning SMX ASICs map scan
13:11:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:11:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:11:50:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
13:11:50:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
13:11:50:uplink:INFO: Setting uplinks mask [0]
13:11:52:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0
13:11:53:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map:
ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
Clock Phase Characteristic:
Optimal Phase: 31
Window Length: 72
Eye Windows:
Uplink 0: ____________________________________________________________________XXXXXXXX____
Data phase characteristics:
Uplink 0:
Optimal Phase: 0
Window Length: 33
Eye Window: _________________XXXXXXX________________
13:11:53:setup_element:INFO: Performing Elink synchronization
13:11:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:11:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:11:53:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
13:11:53:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
13:11:53:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
13:11:53:uplink:INFO: Enabling uplinks [0]
13:11:53:ST3_emu:INFO: Number of chips: 27
addr | upli | dwnli | grp | uplinks | uplinks_map
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_0 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
13:11:55:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
============== Starting SMX ID burn ==============
13:11:58:asictest:WARNING: Fused ID is not zero 6359364699116560949
13:11:58:asictest:INFO: Starting ADC calibration/scan
13:12:04:asictest:INFO: 0, 3, 0.000000
13:12:10:asictest:INFO: 1, 41, 0.300000
13:12:16:asictest:INFO: 2, 76, 0.600000
13:12:21:asictest:INFO: 3, 119, 0.900000
13:12:27:asictest:INFO: 4, 164, 1.200000
13:12:33:asictest:INFO: 5, 181, 1.300000
13:12:38:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV]
13:12:39:asictest:INFO: 19.06 1196.84 846.04 16.58
13:12:40:ST3_smx:INFO: chip: 0-7 19.056781 C 1203.127131 mV
13:12:40:ST3_smx:INFO: # loops 0
13:12:41:ST3_smx:INFO: # loops 1
13:12:43:ST3_smx:INFO: # loops 2
13:12:44:ST3_smx:INFO: # loops 3
13:12:46:ST3_smx:INFO: # loops 4
13:12:48:ST3_smx:INFO: Total # of broken channels: 0
13:12:48:ST3_smx:INFO: List of broken channels: []
13:12:48:ST3_smx:INFO: Total # of broken channels: 0
13:12:48:ST3_smx:INFO: List of broken channels: []
13:12:49:asictest:INFO: Starting CSA scan -
13:12:50:asictest:INFO: 0, 0.065000
13:12:50:asictest:INFO: 9, 0.150300
13:12:51:asictest:INFO: 18, 0.227200
13:12:51:asictest:INFO: 27, 0.299900
13:12:52:asictest:INFO: 36, 0.373000
13:12:53:asictest:INFO: 45, 0.441800
13:12:53:asictest:INFO: 54, 0.501400
13:12:54:asictest:INFO: 63, 0.543700
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_11_21-13_11_43
OPERATOR : Olga B.; 13:27:40:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-000-006-035-05//TestDate_2023_11_21-13_11_43/
SITE : GSI
SETUP : GSI_TEST_SETUP_2
Set-ID : 0806L055-M002 | side-P | index: (5/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
HW_ADDR : 0x7 | VERS_NO : 2.2
ASIC_ID : XA-000-08-002-000-006-035-05 | FUSED_ID : 6359364699116560949
IC_TEMP : 8.23 | VDDM : 1120.42 | AUX_INT : 0.00 | CsaBias : 139.35
CONF_FAIL_REG : 0
CSA_BIAS : 15
THR2_GLB : 30
ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
ADC_Chi2/NDF : 1.57436e-05 / 1
ADC_P0 : 0.00000e+00 ± 3.96782e-03
ADC_P1 : 8.30099e-03 ± 1.05796e-04
ADC_P2 : -6.11705e-06 ± 6.43186e-07
CSA_Chi2/NDF : 1.03525e-04 / 1
CSA_P0 : 6.35292e-02 ± 3.82963e-03
CSA_P1 : 9.82731e-03 ± 2.83974e-04
CSA_P2 : -3.37228e-05 ± 4.33410e-06
---------------------------------------
N_BROKEN_DISC : 0 | N_BROKEN_FAST : []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.201', '0.2683', '1.800', '0.1285', '1.800', '0.1314', '7.000', '0.7080']
VI_after__Init : ['1.200', '0.2690', '1.800', '0.1269', '1.800', '0.1298', '7.000', '0.7080']
VI_at__the_End : ['1.200', '0.5436', '1.800', '0.0744', '1.800', '0.1480', '7.000', '0.7078']