XA-000-08-002-000-006-046-05 21.11.23 13:05:38
ADC4
SMX_7
CSA
Calibration
ADC
CSA
Info
13:05:38:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:05:38:ST3_Shared:INFO: -------------------------Microcable-------------------------
13:05:38:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:05:40:smx_tester:INFO: Scanning setup
13:05:40:elinks:INFO: Disabling clock on downlink 0
13:05:40:elinks:INFO: Disabling clock on downlink 1
13:05:40:elinks:INFO: Disabling clock on downlink 2
13:05:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:05:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:05:40:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
13:05:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:05:40:elinks:INFO: Disabling clock on downlink 0
13:05:40:elinks:INFO: Disabling clock on downlink 1
13:05:40:elinks:INFO: Disabling clock on downlink 2
13:05:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:05:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:05:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:05:40:elinks:INFO: Disabling clock on downlink 0
13:05:40:elinks:INFO: Disabling clock on downlink 1
13:05:40:elinks:INFO: Disabling clock on downlink 2
13:05:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:05:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:05:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:05:40:setup_element:INFO: Scanning clock phase
13:05:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:05:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:05:41:setup_element:INFO: Clock phase scan results for group 0, downlink 0
13:05:41:setup_element:INFO: Eye window for uplink 0 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:05:41:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 0
13:05:41:setup_element:INFO: Scanning data phases
13:05:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:05:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:05:46:setup_element:INFO: Data phase scan results for group 0, downlink 0
13:05:46:setup_element:INFO: Eye window for uplink 0 : _______________XXXXXXX__________________
Data delay found: 38
13:05:46:setup_element:INFO: Setting the data phase to 38 for uplink 0
13:05:46:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 73
Eye Windows:
Uplink 0: _____________________________________________________________________XXXXXXX____
Data phase characteristics:
Uplink 0:
Optimal Phase: 38
Window Length: 33
Eye Window: _______________XXXXXXX__________________
]
13:05:46:setup_element:INFO: Beginning SMX ASICs map scan
13:05:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:05:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:05:46:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
13:05:46:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
13:05:46:uplink:INFO: Setting uplinks mask [0]
13:05:47:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0
13:05:48:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map:
ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 73
Eye Windows:
Uplink 0: _____________________________________________________________________XXXXXXX____
Data phase characteristics:
Uplink 0:
Optimal Phase: 38
Window Length: 33
Eye Window: _______________XXXXXXX__________________
13:05:48:setup_element:INFO: Performing Elink synchronization
13:05:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:05:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:05:48:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
13:05:48:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
13:05:49:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
13:05:49:uplink:INFO: Enabling uplinks [0]
13:05:49:ST3_emu:INFO: Number of chips: 24
addr | upli | dwnli | grp | uplinks | uplinks_map
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
7 | [0] | 0 | 0 | [0] | [(0, 0)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_0 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
13:05:50:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
============== Starting SMX ID burn ==============
13:05:53:asictest:WARNING: Fused ID is not zero 6359364699116561125
13:05:54:asictest:INFO: Starting ADC calibration/scan
13:06:00:asictest:INFO: 0, 59, 0.000000
13:06:05:asictest:INFO: 1, 63, 0.300000
13:06:11:asictest:INFO: 2, 80, 0.600000
13:06:17:asictest:INFO: 3, 124, 0.901000
13:06:23:asictest:INFO: 4, 172, 1.200000
13:06:29:asictest:INFO: 5, 207, 1.300000
13:06:34:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV]
13:06:35:asictest:INFO: 6.32 1172.92 835.91 478.07
13:06:36:ST3_smx:INFO: chip: 0-7 6.319351 C 1172.922469 mV
13:06:36:ST3_smx:INFO: # loops 0
13:06:37:ST3_smx:INFO: # loops 1
13:06:39:ST3_smx:INFO: # loops 2
13:06:40:ST3_smx:INFO: # loops 3
13:06:42:ST3_smx:INFO: # loops 4
13:06:44:ST3_smx:INFO: Total # of broken channels: 0
13:06:44:ST3_smx:INFO: List of broken channels: []
13:06:44:ST3_smx:INFO: Total # of broken channels: 0
13:06:44:ST3_smx:INFO: List of broken channels: []
13:06:45:asictest:INFO: Starting CSA scan -
13:06:45:asictest:INFO: 0, 0.064500
13:06:46:asictest:INFO: 9, 0.146300
13:06:47:asictest:INFO: 18, 0.222700
13:06:47:asictest:INFO: 27, 0.296900
13:06:48:asictest:INFO: 36, 0.371200
13:06:49:asictest:INFO: 45, 0.438800
13:06:49:asictest:INFO: 54, 0.497200
13:06:50:asictest:INFO: 63, 0.535700
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_11_21-13_05_38
OPERATOR : Olga B.;
SITE : GSI
SETUP : GSI_TEST_SETUP_2
Set-ID : 0806L055-M002 | side-P | index: (2/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
HW_ADDR : 0x7 | VERS_NO : 2.2
ASIC_ID : XA-000-08-002-000-006-046-05 | FUSED_ID : 6359364699116561125
IC_TEMP : -0.29 | VDDM : 1087.05 | AUX_INT : 350.49 | CsaBias : 373.45
CONF_FAIL_REG : 0
CSA_BIAS : 15
THR2_GLB : 30
ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
ADC_Chi2/NDF : 2.24703e-03 / 2
ADC_P0 : 0.00000e+00 ± 3.35189e-02
ADC_P1 : 8.61368e-03 ± 5.01406e-04
ADC_P2 : -1.07629e-05 ± 2.81514e-06
CSA_Chi2/NDF : 1.69937e-04 / 2
CSA_P0 : 6.10125e-02 ± 4.90657e-03
CSA_P1 : 9.86224e-03 ± 3.63831e-04
CSA_P2 : -3.52807e-05 ± 5.55290e-06
---------------------------------------
N_BROKEN_DISC : 0 | N_BROKEN_FAST : []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.201', '0.3654', '1.800', '0.0520', '1.800', '0.0983', '7.000', '0.7035']
VI_after__Init : ['1.200', '0.3668', '1.800', '0.0520', '1.800', '0.1473', '7.000', '0.7079']
VI_at__the_End : ['1.200', '0.5332', '1.800', '0.0706', '1.800', '0.1694', '7.000', '0.7080']
13:06:54:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-000-006-046-05//TestDate_2023_11_21-13_05_38/