
XA-000-08-002-000-006-213-03 16.08.23 09:47:21
ADC4

SMX_7

CSA

Calibration
ADC
CSA
Report.txt
09:47:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:47:21:ST3_Shared:INFO: -------------------------Microcable------------------------- 09:47:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:47:23:smx_tester:INFO: Scanning setup 09:47:23:elinks:INFO: Disabling clock on downlink 0 09:47:23:elinks:INFO: Disabling clock on downlink 1 09:47:23:elinks:INFO: Disabling clock on downlink 2 09:47:23:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:47:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:47:23:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0 09:47:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:47:23:elinks:INFO: Disabling clock on downlink 0 09:47:23:elinks:INFO: Disabling clock on downlink 1 09:47:23:elinks:INFO: Disabling clock on downlink 2 09:47:23:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:47:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:47:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:47:23:elinks:INFO: Disabling clock on downlink 0 09:47:23:elinks:INFO: Disabling clock on downlink 1 09:47:23:elinks:INFO: Disabling clock on downlink 2 09:47:23:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:47:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:47:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:47:24:setup_element:INFO: Scanning clock phase 09:47:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:47:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 09:47:24:setup_element:INFO: Clock phase scan results for group 0, downlink 0 09:47:24:setup_element:INFO: Eye window for uplink 0 : _______________________________________________XXXXXX___________________________ Clock Delay: 9 09:47:24:setup_element:INFO: Setting the clock phase to 9 for group 0, downlink 0 09:47:24:setup_element:INFO: Scanning data phases 09:47:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:47:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 09:47:29:setup_element:INFO: Data phase scan results for group 0, downlink 0 09:47:29:setup_element:INFO: Eye window for uplink 0 : XXXXX__________________________________X Data delay found: 21 09:47:29:setup_element:INFO: Setting the data phase to 21 for uplink 0 09:47:29:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 0 Uplinks: [0] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 9 Window Length: 74 Eye Windows: Uplink 0: _______________________________________________XXXXXX___________________________ Data phase characteristics: Uplink 0: Optimal Phase: 21 Window Length: 34 Eye Window: XXXXX__________________________________X ] 09:47:29:setup_element:INFO: Beginning SMX ASICs map scan 09:47:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:47:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 09:47:29:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 09:47:29:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 09:47:29:uplink:INFO: Setting uplinks mask [0] 09:47:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0 09:47:31:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 0 Uplinks: [0] ASICs Map: ASIC address 0x7: (ASIC uplink, uplink): (0, 0) Clock Phase Characteristic: Optimal Phase: 9 Window Length: 74 Eye Windows: Uplink 0: _______________________________________________XXXXXX___________________________ Data phase characteristics: Uplink 0: Optimal Phase: 21 Window Length: 34 Eye Window: XXXXX__________________________________X 09:47:31:setup_element:INFO: Performing Elink synchronization 09:47:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:47:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 09:47:32:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 09:47:32:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 09:47:32:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0 09:47:32:uplink:INFO: Enabling uplinks [0] 09:47:32:ST3_emu:INFO: Number of chips: 1 09:47:32:ST3_emu:INFO: Chip address: 0x7 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7 09:47:33:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values ============== Starting SMX ID burn ============== 09:47:36:asictest:WARNING: Fused ID is not zero 6359364699116563795 09:47:37:asictest:INFO: Starting ADC calibration/scan 09:47:42:asictest:INFO: 0, 2, 0.000000 09:47:48:asictest:INFO: 1, 44, 0.300000 09:47:54:asictest:INFO: 2, 81, 0.600000 09:48:00:asictest:INFO: 3, 126, 0.900000 09:48:05:asictest:INFO: 4, 175, 1.200000 09:48:11:asictest:INFO: 5, 192, 1.300000 09:48:17:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV] 09:48:17:asictest:INFO: 12.63 1201.11 782.66 7.86 09:48:18:ST3_smx:INFO: chip: 0-7 12.630709 C 1201.108900 mV 09:48:18:ST3_smx:INFO: # loops 0 09:48:20:ST3_smx:INFO: # loops 1 09:48:22:ST3_smx:INFO: # loops 2 09:48:23:ST3_smx:INFO: # loops 3 09:48:25:ST3_smx:INFO: # loops 4 09:48:27:ST3_smx:INFO: Total # of broken channels: 0 09:48:27:ST3_smx:INFO: List of broken channels: [] 09:48:27:ST3_smx:INFO: Total # of broken channels: 0 09:48:27:ST3_smx:INFO: List of broken channels: [] 09:48:28:asictest:INFO: Starting CSA scan - 09:48:28:asictest:INFO: 0, 0.063500 09:48:29:asictest:INFO: 9, 0.151000 09:48:30:asictest:INFO: 18, 0.232900 09:48:30:asictest:INFO: 27, 0.313800 09:48:31:asictest:INFO: 36, 0.387900 09:48:32:asictest:INFO: 45, 0.454800 09:48:33:asictest:INFO: 54, 0.501000 09:48:34:asictest:INFO: 63, 0.525300 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : Microcable TEST_DATE : 2023_08_16-09_47_21 OPERATOR : Oleksandr S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : 0014L000-M001 | side-P | index: (5/8) --------------------------------------- --------------------------------------- ASIC_CONFIG_PARAMETERS HW_ADDR : 0x7 | VERS_NO : 2.2 ASIC_ID : XA-000-08-002-000-006-213-03 | FUSED_ID : 6359364699116563795 IC_TEMP : 5.85 | VDDM : 1075.48 | AUX_INT : 0.00 | CsaBias : 101.28 CONF_FAIL_REG : 0 CSA_BIAS : 15 THR2_GLB : 30 ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122 ADC_Chi2/NDF : 2.27599e-06 / 1 ADC_P0 : 0.00000e+00 ± 1.50864e-03 ADC_P1 : 7.86493e-03 ± 2.55888e-05 ADC_P2 : -5.72255e-06 ± 1.50723e-07 CSA_Chi2/NDF : 3.46291e-04 / 1 CSA_P0 : 5.70917e-02 ± 7.00414e-03 CSA_P1 : 1.12638e-02 ± 5.19370e-04 CSA_P2 : -5.86420e-05 ± 7.92677e-06 --------------------------------------- N_BROKEN_DISC : 0 | N_BROKEN_FAST : [] N_BROKEN_CABLE : 0 LIST_OF_BROKEN_CABLES : [] --------------------------------------- VI_before_Init : ['1.199', '0.2966', '1.800', '0.0895', '1.801', '0.1461', '7.000', '0.6885'] VI_after__Init : ['1.200', '0.2965', '1.800', '0.0892', '1.800', '0.1445', '7.000', '0.6901'] VI_at__the_End : ['1.200', '0.5249', '1.800', '0.0731', '1.800', '0.1469', '7.000', '0.6898'] 09:48:40:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-000-006-213-03//TestDate_2023_08_16-09_47_21/
Comment.txt
01Tr-5-PA (P-site)