XA-000-08-002-000-006-216-03 16.08.23 09:49:36
ADC4
SMX_7
CSA
Calibration
ADC
CSA
Info
09:49:36:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:49:36:ST3_Shared:INFO: -------------------------Microcable-------------------------
09:49:36:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:49:38:smx_tester:INFO: Scanning setup
09:49:38:elinks:INFO: Disabling clock on downlink 0
09:49:38:elinks:INFO: Disabling clock on downlink 1
09:49:38:elinks:INFO: Disabling clock on downlink 2
09:49:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:49:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:49:38:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
09:49:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:49:38:elinks:INFO: Disabling clock on downlink 0
09:49:38:elinks:INFO: Disabling clock on downlink 1
09:49:38:elinks:INFO: Disabling clock on downlink 2
09:49:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:49:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:49:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:49:38:elinks:INFO: Disabling clock on downlink 0
09:49:38:elinks:INFO: Disabling clock on downlink 1
09:49:38:elinks:INFO: Disabling clock on downlink 2
09:49:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:49:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:49:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:49:38:setup_element:INFO: Scanning clock phase
09:49:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:49:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:49:38:setup_element:INFO: Clock phase scan results for group 0, downlink 0
09:49:38:setup_element:INFO: Eye window for uplink 0 : __________________________________________________XXXXXX________________________
Clock Delay: 12
09:49:38:setup_element:INFO: Setting the clock phase to 12 for group 0, downlink 0
09:49:38:setup_element:INFO: Scanning data phases
09:49:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:49:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:49:43:setup_element:INFO: Data phase scan results for group 0, downlink 0
09:49:43:setup_element:INFO: Eye window for uplink 0 : __XXXX__________________________________
Data delay found: 23
09:49:43:setup_element:INFO: Setting the data phase to 23 for uplink 0
09:49:43:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 12
Window Length: 74
Eye Windows:
Uplink 0: __________________________________________________XXXXXX________________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 23
Window Length: 36
Eye Window: __XXXX__________________________________
]
09:49:43:setup_element:INFO: Beginning SMX ASICs map scan
09:49:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:49:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:49:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
09:49:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
09:49:43:uplink:INFO: Setting uplinks mask [0]
09:49:45:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0
09:49:46:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map:
ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
Clock Phase Characteristic:
Optimal Phase: 12
Window Length: 74
Eye Windows:
Uplink 0: __________________________________________________XXXXXX________________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 23
Window Length: 36
Eye Window: __XXXX__________________________________
09:49:46:setup_element:INFO: Performing Elink synchronization
09:49:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:49:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:49:46:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
09:49:46:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
09:49:46:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
09:49:46:uplink:INFO: Enabling uplinks [0]
09:49:46:ST3_emu:INFO: Number of chips: 1
09:49:46:ST3_emu:INFO: Chip address: 0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
09:49:47:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
============== Starting SMX ID burn ==============
09:49:51:asictest:WARNING: Fused ID is not zero 6359364699116563843
09:49:51:asictest:INFO: Starting ADC calibration/scan
09:49:57:asictest:INFO: 0, 0, 0.000000
09:50:03:asictest:INFO: 1, 39, 0.300000
09:50:08:asictest:INFO: 2, 79, 0.600000
09:50:14:asictest:INFO: 3, 123, 0.900000
09:50:20:asictest:INFO: 4, 170, 1.200000
09:50:26:asictest:INFO: 5, 187, 1.299000
09:50:31:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV]
09:50:31:asictest:INFO: 15.46 1198.51 786.49 0.00
09:50:33:ST3_smx:INFO: chip: 0-7 18.953663 C 1198.507865 mV
09:50:33:ST3_smx:INFO: # loops 0
09:50:34:ST3_smx:INFO: # loops 1
09:50:36:ST3_smx:INFO: # loops 2
09:50:38:ST3_smx:INFO: # loops 3
09:50:39:ST3_smx:INFO: # loops 4
09:50:41:ST3_smx:INFO: Total # of broken channels: 0
09:50:41:ST3_smx:INFO: List of broken channels: []
09:50:41:ST3_smx:INFO: Total # of broken channels: 0
09:50:41:ST3_smx:INFO: List of broken channels: []
09:50:42:asictest:INFO: Starting CSA scan -
09:50:43:asictest:INFO: 0, 0.066200
09:50:43:asictest:INFO: 9, 0.149700
09:50:44:asictest:INFO: 18, 0.225800
09:50:45:asictest:INFO: 27, 0.299900
09:50:45:asictest:INFO: 36, 0.368800
09:50:46:asictest:INFO: 45, 0.432200
09:50:47:asictest:INFO: 54, 0.484800
09:50:47:asictest:INFO: 63, 0.517300
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_08_16-09_49_36
OPERATOR : Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID : 0014L000-M001 | side-P | index: (6/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
HW_ADDR : 0x7 | VERS_NO : 2.2
ASIC_ID : XA-000-08-002-000-006-216-03 | FUSED_ID : 6359364699116563843
IC_TEMP : 8.49 | VDDM : 1112.42 | AUX_INT : 0.00 | CsaBias : 103.44
CONF_FAIL_REG : 0
CSA_BIAS : 15
THR2_GLB : 30
ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
ADC_Chi2/NDF : 3.51890e-06 / 0
ADC_P0 : 0.00000e+00 ± 1.00000e+00
ADC_P1 : 8.03200e-03 ± 2.58407e-02
ADC_P2 : -5.77618e-06 ± 1.51875e-04
CSA_Chi2/NDF : 1.32505e-04 / 0
CSA_P0 : 6.30958e-02 ± 4.33262e-03
CSA_P1 : 1.00741e-02 ± 3.21272e-04
CSA_P2 : -4.39815e-05 ± 4.90334e-06
---------------------------------------
N_BROKEN_DISC : 0 | N_BROKEN_FAST : []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.2512', '1.800', '0.1094', '1.801', '0.1527', '7.000', '0.6884']
VI_after__Init : ['1.200', '0.2658', '1.800', '0.1081', '1.800', '0.1532', '7.000', '0.6898']
VI_at__the_End : ['1.200', '0.5160', '1.800', '0.0690', '1.800', '0.1703', '7.000', '0.6900']
09:50:54:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-000-006-216-03//TestDate_2023_08_16-09_49_36/
Comment
01Tr-5-PA (P-site)