XA-000-08-002-000-006-217-03    16.08.23 09:43:00

ADC4
cADCscan.png
SMX_7
SMX_7.png
CSA
cCSAscan.png
Calibration
ADC
p0.svg
p1.svg
CSA
p0.svg
p2.svg
p1.svg
Report.txt
            09:43:00:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:43:00:ST3_Shared:INFO:	-------------------------Microcable-------------------------
09:43:00:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:43:01:smx_tester:INFO:	Scanning setup
09:43:01:elinks:INFO:	Disabling clock on downlink 0
09:43:01:elinks:INFO:	Disabling clock on downlink 1
09:43:01:elinks:INFO:	Disabling clock on downlink 2
09:43:01:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:43:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:43:01:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 0
09:43:01:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:43:01:elinks:INFO:	Disabling clock on downlink 0
09:43:01:elinks:INFO:	Disabling clock on downlink 1
09:43:01:elinks:INFO:	Disabling clock on downlink 2
09:43:01:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:43:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:43:02:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:43:02:elinks:INFO:	Disabling clock on downlink 0
09:43:02:elinks:INFO:	Disabling clock on downlink 1
09:43:02:elinks:INFO:	Disabling clock on downlink 2
09:43:02:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:43:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:43:02:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:43:02:setup_element:INFO:	Scanning clock phase
09:43:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:43:02:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:43:02:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
09:43:02:setup_element:INFO:	Eye window for uplink 0 : ______________________________________________________XXXXXX____________________
Clock Delay: 16
09:43:02:setup_element:INFO:	Setting the clock phase to 16 for group 0, downlink 0
09:43:02:setup_element:INFO:	Scanning data phases
09:43:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:43:02:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:43:07:setup_element:INFO:	Data phase scan results for group 0, downlink 0
09:43:07:setup_element:INFO:	Eye window for uplink 0 : ______XXX_______________________________
Data delay found: 27
09:43:07:setup_element:INFO:	Setting the data phase to 27 for uplink 0
09:43:07:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 16
    Window Length: 74
    Eye Windows:
      Uplink  0: ______________________________________________________XXXXXX____________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 27
      Window Length: 37
      Eye Window: ______XXX_______________________________
]
09:43:07:setup_element:INFO:	Beginning SMX ASICs map scan
09:43:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:43:07:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:43:07:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
09:43:07:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
09:43:07:uplink:INFO:	Setting uplinks mask [0]
09:43:08:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 0
09:43:10:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map:
    ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
  Clock Phase Characteristic:
    Optimal Phase: 16
    Window Length: 74
    Eye Windows:
      Uplink  0: ______________________________________________________XXXXXX____________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 27
      Window Length: 37
      Eye Window: ______XXX_______________________________

09:43:10:setup_element:INFO:	Performing Elink synchronization
09:43:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:43:10:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:43:10:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
09:43:10:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
09:43:10:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
09:43:10:uplink:INFO:	Enabling uplinks [0]
09:43:10:ST3_emu:INFO:	Number of chips: 1
09:43:10:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
09:43:11:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
 ============== Starting SMX ID burn ==============
09:43:14:asictest:WARNING:	Fused ID is not zero 6359364699116563859
09:43:15:asictest:INFO:	 Starting ADC calibration/scan 
09:43:20:asictest:INFO:	0,	0,	0.000000
09:43:26:asictest:INFO:	1,	40,	0.300000
09:43:32:asictest:INFO:	2,	81,	0.600000
09:43:38:asictest:INFO:	3,	128,	0.900000
09:43:44:asictest:INFO:	4,	175,	1.200000
09:43:50:asictest:INFO:	5,	191,	1.300000
09:43:55:asictest:INFO:	T [C] Vddm[mV] CSA [mV] AUX [mV]
09:43:55:asictest:INFO:	 26.29 1201.47  848.96    0.00
09:43:57:ST3_smx:INFO:	chip: 0-7 	 26.288608 C 	 1201.469207 mV
09:43:57:ST3_smx:INFO:	# loops 0
09:43:58:ST3_smx:INFO:	# loops 1
09:44:00:ST3_smx:INFO:	# loops 2
09:44:02:ST3_smx:INFO:	# loops 3
09:44:03:ST3_smx:INFO:	# loops 4
09:44:05:ST3_smx:INFO:	Total # of broken channels: 0
09:44:05:ST3_smx:INFO:	List of broken channels: []
09:44:05:ST3_smx:INFO:	Total # of broken channels: 1
09:44:05:ST3_smx:INFO:	List of broken channels: [121]
09:44:06:asictest:INFO:	 Starting CSA scan -
09:44:07:asictest:INFO:	0,	0.063400
09:44:07:asictest:INFO:	9,	0.144900
09:44:08:asictest:INFO:	18,	0.219000
09:44:08:asictest:INFO:	27,	0.290500
09:44:09:asictest:INFO:	36,	0.360100
09:44:10:asictest:INFO:	45,	0.430100
09:44:11:asictest:INFO:	54,	0.490400
09:44:11:asictest:INFO:	63,	0.535300
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_08_16-09_43_00
OPERATOR  : Oleksandr S.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 0014L000-M001 | side-P | index: (4/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
  HW_ADDR : 0x7 | VERS_NO : 2.2
  ASIC_ID : XA-000-08-002-000-006-217-03 | FUSED_ID : 6359364699116563859
  IC_TEMP :   16.06 | VDDM : 1134.60 | AUX_INT :    0.00 | CsaBias :  129.60
  CONF_FAIL_REG : 0
  CSA_BIAS : 15
  THR2_GLB : 30
  ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
  ADC_Chi2/NDF : 1.26086e-04 / 1
  ADC_P0  : 0.00000e+00 ± 1.12288e-02
  ADC_P1  : 7.70480e-03 ± 1.93647e-04
  ADC_P2  : -4.79576e-06 ± 1.14400e-06
  CSA_Chi2/NDF : 8.91853e-05 / 1
  CSA_P0  : 6.22208e-02 ± 3.55452e-03
  CSA_P1  : 9.31620e-03 ± 2.63574e-04
  CSA_P2  : -2.74912e-05 ± 4.02274e-06
---------------------------------------
N_BROKEN_DISC :  0 | N_BROKEN_FAST :  []
N_BROKEN_CABLE : 1
LIST_OF_BROKEN_CABLES : [121]
---------------------------------------
VI_before_Init : ['1.199', '0.2293', '1.800', '0.1033', '1.801', '0.1465', '6.999', '0.6889']
VI_after__Init : ['1.200', '0.2301', '1.800', '0.1027', '1.800', '0.1464', '7.000', '0.6899']
VI_at__the_End : ['1.200', '0.5348', '1.800', '0.0688', '1.800', '0.1689', '7.000', '0.6898']
09:44:16:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-000-006-217-03//TestDate_2023_08_16-09_43_00/

          
Comment.txt
01Tr-5-PA (P-site)