XA-000-08-002-000-007-137-12    20.07.23 09:36:39

ADC4
cADCscan.png
SMX_7
SMX_7.png
CSA
cCSAscan.png
Calibration
ADC
p0.svg
p1.svg
CSA
p0.svg
p2.svg
p1.svg
Report.txt
            09:36:39:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:36:39:ST3_Shared:INFO:	-------------------------Microcable-------------------------
09:36:39:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:36:42:smx_tester:INFO:	Scanning setup
09:36:42:elinks:INFO:	Disabling clock on downlink 0
09:36:42:elinks:INFO:	Disabling clock on downlink 1
09:36:42:elinks:INFO:	Disabling clock on downlink 2
09:36:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:36:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:36:42:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 0
09:36:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:36:42:elinks:INFO:	Disabling clock on downlink 0
09:36:42:elinks:INFO:	Disabling clock on downlink 1
09:36:42:elinks:INFO:	Disabling clock on downlink 2
09:36:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:36:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:36:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:36:42:elinks:INFO:	Disabling clock on downlink 0
09:36:42:elinks:INFO:	Disabling clock on downlink 1
09:36:42:elinks:INFO:	Disabling clock on downlink 2
09:36:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:36:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:36:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:36:42:setup_element:INFO:	Scanning clock phase
09:36:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:36:42:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:36:42:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
09:36:42:setup_element:INFO:	Eye window for uplink 0 : __________________________________________________XXXXX_________________________
Clock Delay: 12
09:36:42:setup_element:INFO:	Setting the clock phase to 12 for group 0, downlink 0
09:36:42:setup_element:INFO:	Scanning data phases
09:36:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:36:43:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:36:47:setup_element:INFO:	Data phase scan results for group 0, downlink 0
09:36:47:setup_element:INFO:	Eye window for uplink 0 : __XXXX__________________________________
Data delay found: 23
09:36:47:setup_element:INFO:	Setting the data phase to 23 for uplink 0
09:36:47:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 12
    Window Length: 75
    Eye Windows:
      Uplink  0: __________________________________________________XXXXX_________________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 23
      Window Length: 36
      Eye Window: __XXXX__________________________________
]
09:36:47:setup_element:INFO:	Beginning SMX ASICs map scan
09:36:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:36:47:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:36:47:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
09:36:47:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
09:36:48:uplink:INFO:	Setting uplinks mask [0]
09:36:49:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 0
09:36:50:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map:
    ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
  Clock Phase Characteristic:
    Optimal Phase: 12
    Window Length: 75
    Eye Windows:
      Uplink  0: __________________________________________________XXXXX_________________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 23
      Window Length: 36
      Eye Window: __XXXX__________________________________

09:36:50:setup_element:INFO:	Performing Elink synchronization
09:36:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:36:50:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:36:50:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
09:36:50:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
09:36:50:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
09:36:50:uplink:INFO:	Enabling uplinks [0]
09:36:50:ST3_emu:INFO:	Number of chips: 1
09:36:50:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
09:36:52:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
 ============== Starting SMX ID burn ==============
09:36:55:asictest:WARNING:	Fused ID is not zero 6359364699116566684
09:36:56:asictest:INFO:	 Starting ADC calibration/scan 
09:37:02:asictest:INFO:	0,	0,	0.000000
09:37:08:asictest:INFO:	1,	40,	0.300000
09:37:13:asictest:INFO:	2,	80,	0.600000
09:37:19:asictest:INFO:	3,	124,	0.900000
09:37:25:asictest:INFO:	4,	171,	1.200000
09:37:31:asictest:INFO:	5,	188,	1.300000
09:37:36:asictest:INFO:	T [C] Vddm[mV] CSA [mV] AUX [mV]
09:37:37:asictest:INFO:	 21.97 1198.77  800.40    0.00
09:37:38:ST3_smx:INFO:	chip: 0-7 	 21.972101 C 	 1204.856436 mV
09:37:38:ST3_smx:INFO:	# loops 0
09:37:40:ST3_smx:INFO:	# loops 1
09:37:42:ST3_smx:INFO:	# loops 2
09:37:43:ST3_smx:INFO:	# loops 3
09:37:45:ST3_smx:INFO:	# loops 4
09:37:47:ST3_smx:INFO:	Total # of broken channels: 0
09:37:47:ST3_smx:INFO:	List of broken channels: []
09:37:47:ST3_smx:INFO:	Total # of broken channels: 0
09:37:47:ST3_smx:INFO:	List of broken channels: []
09:37:48:asictest:INFO:	 Starting CSA scan -
09:37:49:asictest:INFO:	0,	0.066400
09:37:50:asictest:INFO:	9,	0.150000
09:37:50:asictest:INFO:	18,	0.226600
09:37:51:asictest:INFO:	27,	0.301600
09:37:52:asictest:INFO:	36,	0.372400
09:37:52:asictest:INFO:	45,	0.437700
09:37:53:asictest:INFO:	54,	0.493600
09:37:54:asictest:INFO:	63,	0.530100
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_07_20-09_36_39
OPERATOR  : Oleksandr S.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 0002L099-M002 | side-N | index: (3/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
  HW_ADDR : 0x7 | VERS_NO : 2.2
  ASIC_ID : XA-000-08-002-000-007-137-12 | FUSED_ID : 6359364699116566684
  IC_TEMP :   11.55 | VDDM : 1112.42 | AUX_INT :    0.00 | CsaBias :  109.94
  CONF_FAIL_REG : 0
  CSA_BIAS : 15
  THR2_GLB : 30
  ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
  ADC_Chi2/NDF : 2.46811e-06 / 1
  ADC_P0  : 0.00000e+00 ± 1.57102e-03
  ADC_P1  : 7.92808e-03 ± 2.72835e-05
  ADC_P2  : -5.36689e-06 ± 1.64295e-07
  CSA_Chi2/NDF : 1.23027e-04 / 1
  CSA_P0  : 6.34750e-02 ± 4.17479e-03
  CSA_P1  : 1.00149e-02 ± 3.09568e-04
  CSA_P2  : -3.99618e-05 ± 4.72472e-06
---------------------------------------
N_BROKEN_DISC :  0 | N_BROKEN_FAST :  []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.4298', '1.800', '0.0932', '1.800', '0.1500', '7.000', '0.6892']
VI_after__Init : ['1.200', '0.4339', '1.800', '0.0917', '1.801', '0.1513', '7.000', '0.6901']
VI_at__the_End : ['1.200', '0.5296', '1.800', '0.0726', '1.800', '0.1614', '7.000', '0.6904']
09:38:02:ST3_Shared:INFO:	/home/cbm/public_html/Test_LogDir/Microcable/XA-000-08-002-000-007-137-12//TestDate_2023_07_20-09_36_39/

          
Comment.txt
02Tr-6-PA N-Side