
XA-000-08-002-000-007-147-11 20.07.23 09:28:49
ADC4

SMX_7

CSA

Calibration
ADC
CSA
Report.txt
09:28:49:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:28:49:ST3_Shared:INFO: -------------------------Microcable------------------------- 09:28:49:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:28:51:smx_tester:INFO: Scanning setup 09:28:51:elinks:INFO: Disabling clock on downlink 0 09:28:51:elinks:INFO: Disabling clock on downlink 1 09:28:51:elinks:INFO: Disabling clock on downlink 2 09:28:51:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:28:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:28:51:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0 09:28:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:28:51:elinks:INFO: Disabling clock on downlink 0 09:28:51:elinks:INFO: Disabling clock on downlink 1 09:28:51:elinks:INFO: Disabling clock on downlink 2 09:28:51:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:28:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:28:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:28:51:elinks:INFO: Disabling clock on downlink 0 09:28:51:elinks:INFO: Disabling clock on downlink 1 09:28:52:elinks:INFO: Disabling clock on downlink 2 09:28:52:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:28:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:28:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:28:52:setup_element:INFO: Scanning clock phase 09:28:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:28:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 09:28:52:setup_element:INFO: Clock phase scan results for group 0, downlink 0 09:28:52:setup_element:INFO: Eye window for uplink 0 : ____________________________________________________XXXXXX______________________ Clock Delay: 14 09:28:52:setup_element:INFO: Setting the clock phase to 14 for group 0, downlink 0 09:28:52:setup_element:INFO: Scanning data phases 09:28:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:28:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 09:28:57:setup_element:INFO: Data phase scan results for group 0, downlink 0 09:28:57:setup_element:INFO: Eye window for uplink 0 : __XXXX__________________________________ Data delay found: 23 09:28:57:setup_element:INFO: Setting the data phase to 23 for uplink 0 09:28:57:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 0 Uplinks: [0] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 14 Window Length: 74 Eye Windows: Uplink 0: ____________________________________________________XXXXXX______________________ Data phase characteristics: Uplink 0: Optimal Phase: 23 Window Length: 36 Eye Window: __XXXX__________________________________ ] 09:28:57:setup_element:INFO: Beginning SMX ASICs map scan 09:28:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:28:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 09:28:57:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 09:28:57:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 09:28:57:uplink:INFO: Setting uplinks mask [0] 09:28:58:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0 09:29:00:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 0 Uplinks: [0] ASICs Map: ASIC address 0x7: (ASIC uplink, uplink): (0, 0) Clock Phase Characteristic: Optimal Phase: 14 Window Length: 74 Eye Windows: Uplink 0: ____________________________________________________XXXXXX______________________ Data phase characteristics: Uplink 0: Optimal Phase: 23 Window Length: 36 Eye Window: __XXXX__________________________________ 09:29:00:setup_element:INFO: Performing Elink synchronization 09:29:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:29:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 09:29:00:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 09:29:00:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 09:29:00:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0 09:29:00:uplink:INFO: Enabling uplinks [0] 09:29:00:ST3_emu:INFO: Number of chips: 1 09:29:00:ST3_emu:INFO: Chip address: 0x7 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7 09:29:01:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values ============== Starting SMX ID burn ============== 09:29:05:asictest:WARNING: Fused ID is not zero 6359364699116566843 09:29:06:asictest:INFO: Starting ADC calibration/scan 09:29:12:asictest:INFO: 0, 0, 0.000000 09:29:17:asictest:INFO: 1, 41, 0.300000 09:29:23:asictest:INFO: 2, 82, 0.600000 09:29:29:asictest:INFO: 3, 128, 0.900000 09:29:35:asictest:INFO: 4, 177, 1.200000 09:29:41:asictest:INFO: 5, 193, 1.300000 09:29:46:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV] 09:29:46:asictest:INFO: 21.05 1197.60 811.50 0.00 09:29:48:ST3_smx:INFO: chip: 0-7 21.048256 C 1197.602920 mV 09:29:48:ST3_smx:INFO: # loops 0 09:29:50:ST3_smx:INFO: # loops 1 09:29:51:ST3_smx:INFO: # loops 2 09:29:53:ST3_smx:INFO: # loops 3 09:29:55:ST3_smx:INFO: # loops 4 09:29:56:ST3_smx:INFO: Total # of broken channels: 0 09:29:56:ST3_smx:INFO: List of broken channels: [] 09:29:56:ST3_smx:INFO: Total # of broken channels: 0 09:29:56:ST3_smx:INFO: List of broken channels: [] 09:29:58:asictest:INFO: Starting CSA scan - 09:29:58:asictest:INFO: 0, 0.065500 09:29:59:asictest:INFO: 9, 0.148400 09:30:00:asictest:INFO: 18, 0.224200 09:30:00:asictest:INFO: 27, 0.296800 09:30:01:asictest:INFO: 36, 0.368100 09:30:02:asictest:INFO: 45, 0.433200 09:30:02:asictest:INFO: 54, 0.490400 09:30:03:asictest:INFO: 63, 0.530800 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : Microcable TEST_DATE : 2023_07_20-09_28_49 OPERATOR : Oleksandr S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : 0002L099-M002 | side-N | index: (1/8) --------------------------------------- --------------------------------------- ASIC_CONFIG_PARAMETERS HW_ADDR : 0x7 | VERS_NO : 2.2 ASIC_ID : XA-000-08-002-000-007-147-11 | FUSED_ID : 6359364699116566843 IC_TEMP : 14.30 | VDDM : 1113.82 | AUX_INT : 0.00 | CsaBias : 114.29 CONF_FAIL_REG : 0 CSA_BIAS : 15 THR2_GLB : 30 ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122 ADC_Chi2/NDF : 3.68007e-05 / 1 ADC_P0 : 0.00000e+00 ± 6.06636e-03 ADC_P1 : 7.69560e-03 ± 1.02866e-04 ADC_P2 : -5.06273e-06 ± 6.01370e-07 CSA_Chi2/NDF : 8.71402e-05 / 1 CSA_P0 : 6.34583e-02 ± 3.51353e-03 CSA_P1 : 9.73373e-03 ± 2.60534e-04 CSA_P2 : -3.55526e-05 ± 3.97635e-06 --------------------------------------- N_BROKEN_DISC : 0 | N_BROKEN_FAST : [] N_BROKEN_CABLE : 0 LIST_OF_BROKEN_CABLES : [] --------------------------------------- VI_before_Init : ['1.199', '0.2661', '1.800', '0.1133', '1.800', '0.1619', '6.999', '0.6893'] VI_after__Init : ['1.200', '0.2674', '1.800', '0.1123', '1.800', '0.1614', '7.000', '0.6903'] VI_at__the_End : ['1.200', '0.5301', '1.800', '0.0744', '1.800', '0.1669', '7.000', '0.6904'] 09:30:10:ST3_Shared:INFO: /home/cbm/public_html/Test_LogDir/Microcable/XA-000-08-002-000-007-147-11//TestDate_2023_07_20-09_28_49/
Comment.txt
02Tr-6-PA
N-Side