
XA-000-08-002-000-007-148-11 20.07.23 09:34:12
ADC4

SMX_7

CSA

Calibration
ADC
CSA
Report.txt
09:34:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:34:12:ST3_Shared:INFO: -------------------------Microcable------------------------- 09:34:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:34:15:smx_tester:INFO: Scanning setup 09:34:15:elinks:INFO: Disabling clock on downlink 0 09:34:15:elinks:INFO: Disabling clock on downlink 1 09:34:15:elinks:INFO: Disabling clock on downlink 2 09:34:15:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:34:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:34:15:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0 09:34:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:34:15:elinks:INFO: Disabling clock on downlink 0 09:34:15:elinks:INFO: Disabling clock on downlink 1 09:34:15:elinks:INFO: Disabling clock on downlink 2 09:34:15:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:34:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:34:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:34:15:elinks:INFO: Disabling clock on downlink 0 09:34:15:elinks:INFO: Disabling clock on downlink 1 09:34:15:elinks:INFO: Disabling clock on downlink 2 09:34:15:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:34:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:34:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:34:15:setup_element:INFO: Scanning clock phase 09:34:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:34:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 09:34:16:setup_element:INFO: Clock phase scan results for group 0, downlink 0 09:34:16:setup_element:INFO: Eye window for uplink 0 : ____________________________________________________XXXXXXX_____________________ Clock Delay: 15 09:34:16:setup_element:INFO: Setting the clock phase to 15 for group 0, downlink 0 09:34:16:setup_element:INFO: Scanning data phases 09:34:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:34:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 09:34:21:setup_element:INFO: Data phase scan results for group 0, downlink 0 09:34:21:setup_element:INFO: Eye window for uplink 0 : ___XXX__________________________________ Data delay found: 24 09:34:21:setup_element:INFO: Setting the data phase to 24 for uplink 0 09:34:21:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 0 Uplinks: [0] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 15 Window Length: 73 Eye Windows: Uplink 0: ____________________________________________________XXXXXXX_____________________ Data phase characteristics: Uplink 0: Optimal Phase: 24 Window Length: 37 Eye Window: ___XXX__________________________________ ] 09:34:21:setup_element:INFO: Beginning SMX ASICs map scan 09:34:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:34:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 09:34:21:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 09:34:21:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 09:34:21:uplink:INFO: Setting uplinks mask [0] 09:34:22:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0 09:34:23:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 0 Uplinks: [0] ASICs Map: ASIC address 0x7: (ASIC uplink, uplink): (0, 0) Clock Phase Characteristic: Optimal Phase: 15 Window Length: 73 Eye Windows: Uplink 0: ____________________________________________________XXXXXXX_____________________ Data phase characteristics: Uplink 0: Optimal Phase: 24 Window Length: 37 Eye Window: ___XXX__________________________________ 09:34:23:setup_element:INFO: Performing Elink synchronization 09:34:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:34:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 09:34:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 09:34:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 09:34:23:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0 09:34:23:uplink:INFO: Enabling uplinks [0] 09:34:23:ST3_emu:INFO: Number of chips: 1 09:34:23:ST3_emu:INFO: Chip address: 0x7 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7 09:34:25:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values ============== Starting SMX ID burn ============== 09:34:28:asictest:WARNING: Fused ID is not zero 6359364699116566859 09:34:29:asictest:INFO: Starting ADC calibration/scan 09:34:35:asictest:INFO: 0, 0, 0.000000 09:34:41:asictest:INFO: 1, 38, 0.300000 09:34:47:asictest:INFO: 2, 76, 0.600000 09:34:52:asictest:INFO: 3, 118, 0.900000 09:34:58:asictest:INFO: 4, 162, 1.200000 09:35:04:asictest:INFO: 5, 177, 1.300000 09:35:09:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV] 09:35:10:asictest:INFO: 33.61 1200.92 785.52 0.00 09:35:11:ST3_smx:INFO: chip: 0-7 33.613023 C 1200.922768 mV 09:35:11:ST3_smx:INFO: # loops 0 09:35:13:ST3_smx:INFO: # loops 1 09:35:15:ST3_smx:INFO: # loops 2 09:35:17:ST3_smx:INFO: # loops 3 09:35:18:ST3_smx:INFO: # loops 4 09:35:20:ST3_smx:INFO: Total # of broken channels: 0 09:35:20:ST3_smx:INFO: List of broken channels: [] 09:35:20:ST3_smx:INFO: Total # of broken channels: 0 09:35:20:ST3_smx:INFO: List of broken channels: [] 09:35:21:asictest:INFO: Starting CSA scan - 09:35:22:asictest:INFO: 0, 0.068700 09:35:23:asictest:INFO: 9, 0.154100 09:35:24:asictest:INFO: 18, 0.232000 09:35:24:asictest:INFO: 27, 0.306400 09:35:25:asictest:INFO: 36, 0.379800 09:35:26:asictest:INFO: 45, 0.447600 09:35:26:asictest:INFO: 54, 0.508100 09:35:27:asictest:INFO: 63, 0.553900 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : Microcable TEST_DATE : 2023_07_20-09_34_12 OPERATOR : Oleksandr S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : 0002L099-M002 | side-N | index: (2/8) --------------------------------------- --------------------------------------- ASIC_CONFIG_PARAMETERS HW_ADDR : 0x7 | VERS_NO : 2.2 ASIC_ID : XA-000-08-002-000-007-148-11 | FUSED_ID : 6359364699116566859 IC_TEMP : 22.54 | VDDM : 1154.24 | AUX_INT : 0.00 | CsaBias : 129.83 CONF_FAIL_REG : 0 CSA_BIAS : 15 THR2_GLB : 30 ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122 ADC_Chi2/NDF : 1.35194e-06 / 0 ADC_P0 : 0.00000e+00 ± 1.00000e+00 ADC_P1 : 8.19102e-03 ± 2.78064e-02 ADC_P2 : -4.80195e-06 ± 1.72207e-04 CSA_Chi2/NDF : 6.16307e-05 / 0 CSA_P0 : 6.73250e-02 ± 2.95483e-03 CSA_P1 : 9.86706e-03 ± 2.19106e-04 CSA_P2 : -3.30247e-05 ± 3.34406e-06 --------------------------------------- N_BROKEN_DISC : 0 | N_BROKEN_FAST : [] N_BROKEN_CABLE : 0 LIST_OF_BROKEN_CABLES : [] --------------------------------------- VI_before_Init : ['1.199', '0.2052', '1.800', '0.1076', '1.800', '0.1546', '7.000', '0.6895'] VI_after__Init : ['1.200', '0.2058', '1.800', '0.1068', '1.800', '0.1540', '7.000', '0.6901'] VI_at__the_End : ['1.200', '0.5531', '1.800', '0.0753', '1.800', '0.1717', '7.000', '0.6902'] 09:35:34:ST3_Shared:INFO: /home/cbm/public_html/Test_LogDir/Microcable/XA-000-08-002-000-007-148-11//TestDate_2023_07_20-09_34_12/
Comment.txt
02Tr-6-PA
N-Side