
XA-000-08-002-000-007-179-05 10.08.23 09:17:28
ADC4

SMX_7

CSA

Calibration
ADC
CSA
Report.txt
09:17:28:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:17:28:ST3_Shared:INFO: -------------------------Microcable------------------------- 09:17:28:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:17:30:smx_tester:INFO: Scanning setup 09:17:30:elinks:INFO: Disabling clock on downlink 0 09:17:30:elinks:INFO: Disabling clock on downlink 1 09:17:30:elinks:INFO: Disabling clock on downlink 2 09:17:30:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:17:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:17:30:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0 09:17:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:17:30:elinks:INFO: Disabling clock on downlink 0 09:17:30:elinks:INFO: Disabling clock on downlink 1 09:17:30:elinks:INFO: Disabling clock on downlink 2 09:17:30:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:17:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:17:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:17:30:elinks:INFO: Disabling clock on downlink 0 09:17:30:elinks:INFO: Disabling clock on downlink 1 09:17:30:elinks:INFO: Disabling clock on downlink 2 09:17:30:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:17:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:17:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:17:30:setup_element:INFO: Scanning clock phase 09:17:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:17:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 09:17:30:setup_element:INFO: Clock phase scan results for group 0, downlink 0 09:17:30:setup_element:INFO: Eye window for uplink 0 : _____________________________________________________XXXXXX_____________________ Clock Delay: 15 09:17:30:setup_element:INFO: Setting the clock phase to 15 for group 0, downlink 0 09:17:30:setup_element:INFO: Scanning data phases 09:17:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:17:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 09:17:35:setup_element:INFO: Data phase scan results for group 0, downlink 0 09:17:35:setup_element:INFO: Eye window for uplink 0 : _____XXXX_______________________________ Data delay found: 26 09:17:35:setup_element:INFO: Setting the data phase to 26 for uplink 0 09:17:35:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 0 Uplinks: [0] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 15 Window Length: 74 Eye Windows: Uplink 0: _____________________________________________________XXXXXX_____________________ Data phase characteristics: Uplink 0: Optimal Phase: 26 Window Length: 36 Eye Window: _____XXXX_______________________________ ] 09:17:35:setup_element:INFO: Beginning SMX ASICs map scan 09:17:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:17:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 09:17:35:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 09:17:35:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 09:17:35:uplink:INFO: Setting uplinks mask [0] 09:17:36:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0 09:17:38:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 0 Uplinks: [0] ASICs Map: ASIC address 0x7: (ASIC uplink, uplink): (0, 0) Clock Phase Characteristic: Optimal Phase: 15 Window Length: 74 Eye Windows: Uplink 0: _____________________________________________________XXXXXX_____________________ Data phase characteristics: Uplink 0: Optimal Phase: 26 Window Length: 36 Eye Window: _____XXXX_______________________________ 09:17:38:setup_element:INFO: Performing Elink synchronization 09:17:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:17:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 09:17:38:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 09:17:38:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 09:17:38:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0 09:17:38:uplink:INFO: Enabling uplinks [0] 09:17:38:ST3_emu:INFO: Number of chips: 1 09:17:38:ST3_emu:INFO: Chip address: 0x7 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7 09:17:39:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values ============== Starting SMX ID burn ============== 09:17:42:asictest:WARNING: Fused ID is not zero 6359364699116567349 09:17:43:asictest:INFO: Starting ADC calibration/scan 09:17:49:asictest:INFO: 0, 0, 0.000000 09:17:54:asictest:INFO: 1, 39, 0.300000 09:18:00:asictest:INFO: 2, 78, 0.600000 09:18:06:asictest:INFO: 3, 122, 0.900000 09:18:11:asictest:INFO: 4, 170, 1.200000 09:18:17:asictest:INFO: 5, 187, 1.300000 09:18:23:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV] 09:18:23:asictest:INFO: 15.67 1206.40 758.83 0.00 09:18:25:ST3_smx:INFO: chip: 0-7 15.668689 C 1206.398336 mV 09:18:25:ST3_smx:INFO: # loops 0 09:18:26:ST3_smx:INFO: # loops 1 09:18:28:ST3_smx:INFO: # loops 2 09:18:29:ST3_smx:INFO: # loops 3 09:18:31:ST3_smx:INFO: # loops 4 09:18:32:ST3_smx:INFO: Total # of broken channels: 0 09:18:32:ST3_smx:INFO: List of broken channels: [] 09:18:32:ST3_smx:INFO: Total # of broken channels: 0 09:18:32:ST3_smx:INFO: List of broken channels: [] 09:18:33:asictest:INFO: Starting CSA scan - 09:18:34:asictest:INFO: 0, 0.068000 09:18:35:asictest:INFO: 9, 0.150700 09:18:35:asictest:INFO: 18, 0.227800 09:18:36:asictest:INFO: 27, 0.303200 09:18:37:asictest:INFO: 36, 0.373900 09:18:38:asictest:INFO: 45, 0.439600 09:18:38:asictest:INFO: 54, 0.497100 09:18:39:asictest:INFO: 63, 0.536700 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : Microcable TEST_DATE : 2023_08_10-09_17_28 OPERATOR : Oleksandr S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : 0067L017-M001 | side-P | index: (3/8) --------------------------------------- --------------------------------------- ASIC_CONFIG_PARAMETERS HW_ADDR : 0x7 | VERS_NO : 2.2 ASIC_ID : XA-000-08-002-000-007-179-05 | FUSED_ID : 6359364699116567349 IC_TEMP : 5.20 | VDDM : 1140.31 | AUX_INT : 0.00 | CsaBias : 113.16 CONF_FAIL_REG : 0 CSA_BIAS : 15 THR2_GLB : 30 ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122 ADC_Chi2/NDF : 3.29406e-07 / 0 ADC_P0 : 0.00000e+00 ± 1.00000e+00 ADC_P1 : 8.17423e-03 ± 2.55861e-02 ADC_P2 : -6.54542e-06 ± 1.50387e-04 CSA_Chi2/NDF : 9.67698e-05 / 0 CSA_P0 : 6.52083e-02 ± 3.70257e-03 CSA_P1 : 9.91204e-03 ± 2.74553e-04 CSA_P2 : -3.72575e-05 ± 4.19030e-06 --------------------------------------- N_BROKEN_DISC : 0 | N_BROKEN_FAST : [] N_BROKEN_CABLE : 0 LIST_OF_BROKEN_CABLES : [] --------------------------------------- VI_before_Init : ['1.199', '0.3661', '1.800', '0.1256', '1.800', '0.1727', '7.000', '0.6894'] VI_after__Init : ['1.200', '0.3701', '1.800', '0.1259', '1.800', '0.1688', '7.000', '0.6907'] VI_at__the_End : ['1.200', '0.5381', '1.800', '0.0738', '1.800', '0.1747', '7.000', '0.6908'] 09:18:43:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-000-007-179-05//TestDate_2023_08_10-09_17_28/