
XA-000-08-002-000-007-210-14 12.09.23 12:49:32
ADC4

SMX_7

CSA

Calibration
ADC
CSA
Report.txt
12:49:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:49:32:ST3_Shared:INFO: -------------------------Microcable------------------------- 12:49:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:49:33:smx_tester:INFO: Scanning setup 12:49:33:elinks:INFO: Disabling clock on downlink 0 12:49:33:elinks:INFO: Disabling clock on downlink 1 12:49:33:elinks:INFO: Disabling clock on downlink 2 12:49:33:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:49:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 12:49:33:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0 12:49:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:49:33:elinks:INFO: Disabling clock on downlink 0 12:49:33:elinks:INFO: Disabling clock on downlink 1 12:49:34:elinks:INFO: Disabling clock on downlink 2 12:49:34:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:49:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 12:49:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:49:34:elinks:INFO: Disabling clock on downlink 0 12:49:34:elinks:INFO: Disabling clock on downlink 1 12:49:34:elinks:INFO: Disabling clock on downlink 2 12:49:34:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:49:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:49:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:49:34:setup_element:INFO: Scanning clock phase 12:49:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 12:49:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 12:49:34:setup_element:INFO: Clock phase scan results for group 0, downlink 0 12:49:34:setup_element:INFO: Eye window for uplink 0 : _____________________________________________________XXXXXX_____________________ Clock Delay: 15 12:49:34:setup_element:INFO: Setting the clock phase to 15 for group 0, downlink 0 12:49:34:setup_element:INFO: Scanning data phases 12:49:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 12:49:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 12:49:39:setup_element:INFO: Data phase scan results for group 0, downlink 0 12:49:39:setup_element:INFO: Eye window for uplink 0 : ______XXX_______________________________ Data delay found: 27 12:49:39:setup_element:INFO: Setting the data phase to 27 for uplink 0 12:49:39:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 0 Uplinks: [0] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 15 Window Length: 74 Eye Windows: Uplink 0: _____________________________________________________XXXXXX_____________________ Data phase characteristics: Uplink 0: Optimal Phase: 27 Window Length: 37 Eye Window: ______XXX_______________________________ ] 12:49:39:setup_element:INFO: Beginning SMX ASICs map scan 12:49:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 12:49:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 12:49:39:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 12:49:39:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 12:49:39:uplink:INFO: Setting uplinks mask [0] 12:49:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0 12:49:42:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 0 Uplinks: [0] ASICs Map: ASIC address 0x7: (ASIC uplink, uplink): (0, 0) Clock Phase Characteristic: Optimal Phase: 15 Window Length: 74 Eye Windows: Uplink 0: _____________________________________________________XXXXXX_____________________ Data phase characteristics: Uplink 0: Optimal Phase: 27 Window Length: 37 Eye Window: ______XXX_______________________________ 12:49:42:setup_element:INFO: Performing Elink synchronization 12:49:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 12:49:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 12:49:42:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 12:49:42:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 12:49:42:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0 12:49:42:uplink:INFO: Enabling uplinks [0] 12:49:42:ST3_emu:INFO: Number of chips: 1 12:49:42:ST3_emu:INFO: Chip address: 0x7 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7 12:49:43:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values ============== Starting SMX ID burn ============== 12:49:46:asictest:WARNING: Fused ID is not zero 6359364699116567854 12:49:47:asictest:INFO: Starting ADC calibration/scan 12:49:53:asictest:INFO: 0, 0, 0.000000 12:49:58:asictest:INFO: 1, 42, 0.300000 12:50:04:asictest:INFO: 2, 82, 0.600000 12:50:10:asictest:INFO: 3, 128, 0.900000 12:50:16:asictest:INFO: 4, 176, 1.200000 12:50:21:asictest:INFO: 5, 192, 1.300000 12:50:27:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV] 12:50:27:asictest:INFO: 21.24 1196.34 838.21 0.00 12:50:28:ST3_smx:INFO: chip: 0-7 21.239583 C 1196.340396 mV 12:50:28:ST3_smx:INFO: # loops 0 12:50:30:ST3_smx:INFO: # loops 1 12:50:32:ST3_smx:INFO: # loops 2 12:50:33:ST3_smx:INFO: # loops 3 12:50:35:ST3_smx:INFO: # loops 4 12:50:37:ST3_smx:INFO: Total # of broken channels: 0 12:50:37:ST3_smx:INFO: List of broken channels: [] 12:50:37:ST3_smx:INFO: Total # of broken channels: 1 12:50:37:ST3_smx:INFO: List of broken channels: [0] 12:50:38:asictest:INFO: Starting CSA scan - 12:50:38:asictest:INFO: 0, 0.065500 12:50:39:asictest:INFO: 9, 0.146400 12:50:40:asictest:INFO: 18, 0.220200 12:50:40:asictest:INFO: 27, 0.290700 12:50:41:asictest:INFO: 36, 0.361100 12:50:42:asictest:INFO: 45, 0.428100 12:50:42:asictest:INFO: 54, 0.485800 12:50:43:asictest:INFO: 63, 0.528400 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : Microcable TEST_DATE : 2023_09_12-12_49_32 OPERATOR : Kerstin S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : 0797L018-M002 | side-N | index: (7/8) --------------------------------------- --------------------------------------- ASIC_CONFIG_PARAMETERS HW_ADDR : 0x7 | VERS_NO : 2.2 ASIC_ID : XA-000-08-002-000-007-210-14 | FUSED_ID : 6359364699116567854 IC_TEMP : 11.08 | VDDM : 1117.34 | AUX_INT : 0.00 | CsaBias : 128.81 CONF_FAIL_REG : 0 CSA_BIAS : 15 THR2_GLB : 30 ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122 ADC_Chi2/NDF : 3.70982e-05 / 1 ADC_P0 : 0.00000e+00 ± 6.09083e-03 ADC_P1 : 7.65665e-03 ± 1.04114e-04 ADC_P2 : -4.68809e-06 ± 6.12000e-07 CSA_Chi2/NDF : 8.98995e-05 / 1 CSA_P0 : 6.38667e-02 ± 3.56872e-03 CSA_P1 : 9.36746e-03 ± 2.64627e-04 CSA_P2 : -3.04527e-05 ± 4.03882e-06 --------------------------------------- N_BROKEN_DISC : 0 | N_BROKEN_FAST : [] N_BROKEN_CABLE : 1 LIST_OF_BROKEN_CABLES : [0] --------------------------------------- VI_before_Init : ['1.199', '0.1193', '1.800', '0.1151', '1.800', '0.1503', '7.000', '0.6898'] VI_after__Init : ['1.200', '0.1191', '1.800', '0.1141', '1.800', '0.1495', '7.000', '0.6909'] VI_at__the_End : ['1.200', '0.5279', '1.800', '0.0717', '1.800', '0.1665', '7.000', '0.6908'] 12:53:03:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-000-007-210-14//TestDate_2023_09_12-12_49_32/