XA-000-08-002-000-007-237-07    09.08.23 11:24:54

ADC4
cADCscan.png
SMX_7
SMX_7.png
CSA
cCSAscan.png
Calibration
ADC
p0.svg
p1.svg
CSA
p0.svg
p2.svg
p1.svg
Report.txt
            11:24:54:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:24:54:ST3_Shared:INFO:	-------------------------Microcable-------------------------
11:24:54:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:24:55:smx_tester:INFO:	Scanning setup
11:24:55:elinks:INFO:	Disabling clock on downlink 0
11:24:55:elinks:INFO:	Disabling clock on downlink 1
11:24:55:elinks:INFO:	Disabling clock on downlink 2
11:24:55:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:24:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:24:55:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 0
11:24:55:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:24:55:elinks:INFO:	Disabling clock on downlink 0
11:24:55:elinks:INFO:	Disabling clock on downlink 1
11:24:55:elinks:INFO:	Disabling clock on downlink 2
11:24:55:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:24:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:24:56:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:24:56:elinks:INFO:	Disabling clock on downlink 0
11:24:56:elinks:INFO:	Disabling clock on downlink 1
11:24:56:elinks:INFO:	Disabling clock on downlink 2
11:24:56:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:24:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:24:56:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:24:56:setup_element:INFO:	Scanning clock phase
11:24:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:24:56:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:24:56:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
11:24:56:setup_element:INFO:	Eye window for uplink 0 : _____________________________________________________XXXXXX_____________________
Clock Delay: 15
11:24:56:setup_element:INFO:	Setting the clock phase to 15 for group 0, downlink 0
11:24:56:setup_element:INFO:	Scanning data phases
11:24:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:24:56:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:25:01:setup_element:INFO:	Data phase scan results for group 0, downlink 0
11:25:01:setup_element:INFO:	Eye window for uplink 0 : _____XXX________________________________
Data delay found: 26
11:25:01:setup_element:INFO:	Setting the data phase to 26 for uplink 0
11:25:01:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 15
    Window Length: 74
    Eye Windows:
      Uplink  0: _____________________________________________________XXXXXX_____________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 26
      Window Length: 37
      Eye Window: _____XXX________________________________
]
11:25:01:setup_element:INFO:	Beginning SMX ASICs map scan
11:25:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:25:01:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:25:01:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
11:25:01:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
11:25:01:uplink:INFO:	Setting uplinks mask [0]
11:25:02:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 0
11:25:04:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map:
    ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
  Clock Phase Characteristic:
    Optimal Phase: 15
    Window Length: 74
    Eye Windows:
      Uplink  0: _____________________________________________________XXXXXX_____________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 26
      Window Length: 37
      Eye Window: _____XXX________________________________

11:25:04:setup_element:INFO:	Performing Elink synchronization
11:25:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:25:04:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:25:04:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
11:25:04:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
11:25:04:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
11:25:04:uplink:INFO:	Enabling uplinks [0]
11:25:04:ST3_emu:INFO:	Number of chips: 1
11:25:04:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
11:25:05:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
 ============== Starting SMX ID burn ==============
11:25:08:asictest:WARNING:	Fused ID is not zero 6359364699116568279
11:25:09:asictest:INFO:	 Starting ADC calibration/scan 
11:25:14:asictest:INFO:	0,	0,	0.000000
11:25:20:asictest:INFO:	1,	41,	0.300000
11:25:26:asictest:INFO:	2,	82,	0.600000
11:25:32:asictest:INFO:	3,	128,	0.900000
11:25:37:asictest:INFO:	4,	177,	1.200000
11:25:43:asictest:INFO:	5,	194,	1.300000
11:25:49:asictest:INFO:	T [C] Vddm[mV] CSA [mV] AUX [mV]
11:25:49:asictest:INFO:	 17.30 1200.96  844.22    0.00
11:25:50:ST3_smx:INFO:	chip: 0-7 	 17.303362 C 	 1206.801105 mV
11:25:50:ST3_smx:INFO:	# loops 0
11:25:52:ST3_smx:INFO:	# loops 1
11:25:53:ST3_smx:INFO:	# loops 2
11:25:55:ST3_smx:INFO:	# loops 3
11:25:56:ST3_smx:INFO:	# loops 4
11:25:58:ST3_smx:INFO:	Total # of broken channels: 0
11:25:58:ST3_smx:INFO:	List of broken channels: []
11:25:58:ST3_smx:INFO:	Total # of broken channels: 0
11:25:58:ST3_smx:INFO:	List of broken channels: []
11:25:59:asictest:INFO:	 Starting CSA scan -
11:26:00:asictest:INFO:	0,	0.063200
11:26:00:asictest:INFO:	9,	0.145100
11:26:01:asictest:INFO:	18,	0.220400
11:26:02:asictest:INFO:	27,	0.292100
11:26:02:asictest:INFO:	36,	0.365500
11:26:03:asictest:INFO:	45,	0.432500
11:26:04:asictest:INFO:	54,	0.491200
11:26:05:asictest:INFO:	63,	0.532600
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_08_09-11_24_54
OPERATOR  : Robert V.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 0058L017-M000 | side-P | index: (7/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
  HW_ADDR : 0x7 | VERS_NO : 2.2
  ASIC_ID : XA-000-08-002-000-007-237-07 | FUSED_ID : 6359364699116568279
  IC_TEMP :    7.24 | VDDM : 1118.14 | AUX_INT :    0.00 | CsaBias :  114.73
  CONF_FAIL_REG : 0
  CSA_BIAS : 15
  THR2_GLB : 30
  ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
  ADC_Chi2/NDF : 1.06477e-05 / 1
  ADC_P0  : 0.00000e+00 ± 3.26308e-03
  ADC_P1  : 7.72870e-03 ± 5.49330e-05
  ADC_P2  : -5.33103e-06 ± 3.20100e-07
  CSA_Chi2/NDF : 1.19175e-04 / 1
  CSA_P0  : 6.09167e-02 ± 4.10890e-03
  CSA_P1  : 9.61019e-03 ± 3.04683e-04
  CSA_P2  : -3.23192e-05 ± 4.65016e-06
---------------------------------------
N_BROKEN_DISC :  0 | N_BROKEN_FAST :  []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.3261', '1.800', '0.0596', '1.800', '0.1454', '7.000', '0.6890']
VI_after__Init : ['1.200', '0.3311', '1.800', '0.0597', '1.800', '0.1449', '7.000', '0.6898']
VI_at__the_End : ['1.200', '0.5324', '1.800', '0.0727', '1.800', '0.1634', '7.000', '0.6900']
11:26:50:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-000-007-237-07//TestDate_2023_08_09-11_24_54/
11:28:05:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-000-007-237-07//TestDate_2023_08_09-11_24_54/