XA-000-08-002-000-008-093-00    26.07.23 10:30:38

ADC4
cADCscan.png
SMX_7
SMX_7.png
CSA
cCSAscan.png
Calibration
ADC
p0.svg
p1.svg
CSA
p0.svg
p2.svg
p1.svg
Report.txt
            10:30:38:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:30:38:ST3_Shared:INFO:	-------------------------Microcable-------------------------
10:30:38:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:30:40:smx_tester:INFO:	Scanning setup
10:30:40:elinks:INFO:	Disabling clock on downlink 0
10:30:40:elinks:INFO:	Disabling clock on downlink 1
10:30:40:elinks:INFO:	Disabling clock on downlink 2
10:30:40:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:30:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:30:40:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 0
10:30:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:30:40:elinks:INFO:	Disabling clock on downlink 0
10:30:40:elinks:INFO:	Disabling clock on downlink 1
10:30:40:elinks:INFO:	Disabling clock on downlink 2
10:30:40:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:30:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:30:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:30:40:elinks:INFO:	Disabling clock on downlink 0
10:30:40:elinks:INFO:	Disabling clock on downlink 1
10:30:40:elinks:INFO:	Disabling clock on downlink 2
10:30:40:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:30:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:30:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:30:40:setup_element:INFO:	Scanning clock phase
10:30:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:30:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
10:30:41:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
10:30:41:setup_element:INFO:	Eye window for uplink 0 : _____________________________________________________XXXXXX_____________________
Clock Delay: 15
10:30:41:setup_element:INFO:	Setting the clock phase to 15 for group 0, downlink 0
10:30:41:setup_element:INFO:	Scanning data phases
10:30:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:30:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
10:30:46:setup_element:INFO:	Data phase scan results for group 0, downlink 0
10:30:46:setup_element:INFO:	Eye window for uplink 0 : _____XXXX_______________________________
Data delay found: 26
10:30:46:setup_element:INFO:	Setting the data phase to 26 for uplink 0
10:30:46:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 15
    Window Length: 74
    Eye Windows:
      Uplink  0: _____________________________________________________XXXXXX_____________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 26
      Window Length: 36
      Eye Window: _____XXXX_______________________________
]
10:30:46:setup_element:INFO:	Beginning SMX ASICs map scan
10:30:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:30:46:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
10:30:46:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
10:30:46:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
10:30:46:uplink:INFO:	Setting uplinks mask [0]
10:30:47:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 0
10:30:48:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map:
    ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
  Clock Phase Characteristic:
    Optimal Phase: 15
    Window Length: 74
    Eye Windows:
      Uplink  0: _____________________________________________________XXXXXX_____________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 26
      Window Length: 36
      Eye Window: _____XXXX_______________________________

10:30:48:setup_element:INFO:	Performing Elink synchronization
10:30:48:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:30:48:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
10:30:48:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
10:30:48:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
10:30:48:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
10:30:48:uplink:INFO:	Enabling uplinks [0]
10:30:49:ST3_emu:INFO:	Number of chips: 1
10:30:49:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
10:30:50:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
 ============== Starting SMX ID burn ==============
10:30:53:asictest:WARNING:	Fused ID is not zero 6359364699116570064
10:30:53:asictest:INFO:	 Starting ADC calibration/scan 
10:30:59:asictest:INFO:	0,	0,	0.000000
10:31:05:asictest:INFO:	1,	39,	0.300000
10:31:10:asictest:INFO:	2,	78,	0.600000
10:31:16:asictest:INFO:	3,	122,	0.900000
10:31:22:asictest:INFO:	4,	168,	1.200000
10:31:28:asictest:INFO:	5,	184,	1.300000
10:31:33:asictest:INFO:	T [C] Vddm[mV] CSA [mV] AUX [mV]
10:31:34:asictest:INFO:	 21.37 1200.30  797.33    0.00
10:31:35:ST3_smx:INFO:	chip: 0-7 	 21.368875 C 	 1200.300242 mV
10:31:35:ST3_smx:INFO:	# loops 0
10:31:37:ST3_smx:INFO:	# loops 1
10:31:38:ST3_smx:INFO:	# loops 2
10:31:40:ST3_smx:INFO:	# loops 3
10:31:41:ST3_smx:INFO:	# loops 4
10:31:43:ST3_smx:INFO:	Total # of broken channels: 0
10:31:43:ST3_smx:INFO:	List of broken channels: []
10:31:43:ST3_smx:INFO:	Total # of broken channels: 0
10:31:43:ST3_smx:INFO:	List of broken channels: []
10:31:44:asictest:INFO:	 Starting CSA scan -
10:31:45:asictest:INFO:	0,	0.065400
10:31:45:asictest:INFO:	9,	0.145000
10:31:46:asictest:INFO:	18,	0.218300
10:31:47:asictest:INFO:	27,	0.288800
10:31:47:asictest:INFO:	36,	0.358500
10:31:48:asictest:INFO:	45,	0.422500
10:31:49:asictest:INFO:	54,	0.480200
10:31:50:asictest:INFO:	63,	0.524300
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_07_26-10_30_38
OPERATOR  : Oleksandr S.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 0421L028-M002 | side-N | index: (2/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
  HW_ADDR : 0x7 | VERS_NO : 2.2
  ASIC_ID : XA-000-08-002-000-008-093-00 | FUSED_ID : 6359364699116570064
  IC_TEMP :   10.75 | VDDM : 1143.20 | AUX_INT :    0.00 | CsaBias :  126.56
  CONF_FAIL_REG : 0
  CSA_BIAS : 15
  THR2_GLB : 30
  ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
  ADC_Chi2/NDF : 1.42897e-07 / 0
  ADC_P0  : 0.00000e+00 ± 1.00000e+00
  ADC_P1  : 7.99023e-03 ± 2.65494e-02
  ADC_P2  : -5.03327e-06 ± 1.58320e-04
  CSA_Chi2/NDF : 5.53831e-05 / 0
  CSA_P0  : 6.38583e-02 ± 2.80106e-03
  CSA_P1  : 9.24722e-03 ± 2.07704e-04
  CSA_P2  : -2.98207e-05 ± 3.17003e-06
---------------------------------------
N_BROKEN_DISC :  0 | N_BROKEN_FAST :  []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.2312', '1.800', '0.0765', '1.800', '0.1554', '7.000', '0.6892']
VI_after__Init : ['1.200', '0.2338', '1.800', '0.0761', '1.800', '0.1531', '7.001', '0.6904']
VI_at__the_End : ['1.200', '0.5265', '1.800', '0.0723', '1.800', '0.1701', '7.000', '0.6902']
10:31:59:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-000-008-093-00//TestDate_2023_07_26-10_30_38/