XA-000-08-002-001-006-082-01    13.09.23 14:30:16

ADC4
cADCscan.png
SMX_7
SMX_7.png
CSA
cCSAscan.png
Calibration
ADC
p0.svg
p1.svg
CSA
p0.svg
p2.svg
p1.svg
Report.txt
            14:30:16:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:30:16:ST3_Shared:INFO:	-------------------------Microcable-------------------------
14:30:16:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:30:17:smx_tester:INFO:	Scanning setup
14:30:18:elinks:INFO:	Disabling clock on downlink 0
14:30:18:elinks:INFO:	Disabling clock on downlink 1
14:30:18:elinks:INFO:	Disabling clock on downlink 2
14:30:18:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:30:18:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:30:18:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 0
14:30:18:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:30:18:elinks:INFO:	Disabling clock on downlink 0
14:30:18:elinks:INFO:	Disabling clock on downlink 1
14:30:18:elinks:INFO:	Disabling clock on downlink 2
14:30:18:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:30:18:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:30:18:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:30:18:elinks:INFO:	Disabling clock on downlink 0
14:30:18:elinks:INFO:	Disabling clock on downlink 1
14:30:18:elinks:INFO:	Disabling clock on downlink 2
14:30:18:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:30:18:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:30:18:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:30:18:setup_element:INFO:	Scanning clock phase
14:30:18:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:30:18:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
14:30:18:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
14:30:18:setup_element:INFO:	Eye window for uplink 0 : ____________________________________________________XXXXXXX_____________________
Clock Delay: 15
14:30:18:setup_element:INFO:	Setting the clock phase to 15 for group 0, downlink 0
14:30:18:setup_element:INFO:	Scanning data phases
14:30:18:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:30:18:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
14:30:23:setup_element:INFO:	Data phase scan results for group 0, downlink 0
14:30:23:setup_element:INFO:	Eye window for uplink 0 : ___XXXX_________________________________
Data delay found: 24
14:30:23:setup_element:INFO:	Setting the data phase to 24 for uplink 0
14:30:23:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 15
    Window Length: 73
    Eye Windows:
      Uplink  0: ____________________________________________________XXXXXXX_____________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 24
      Window Length: 36
      Eye Window: ___XXXX_________________________________
]
14:30:23:setup_element:INFO:	Beginning SMX ASICs map scan
14:30:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:30:23:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
14:30:23:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
14:30:23:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
14:30:23:uplink:INFO:	Setting uplinks mask [0]
14:30:25:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 0
14:30:26:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map:
    ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
  Clock Phase Characteristic:
    Optimal Phase: 15
    Window Length: 73
    Eye Windows:
      Uplink  0: ____________________________________________________XXXXXXX_____________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 24
      Window Length: 36
      Eye Window: ___XXXX_________________________________

14:30:26:setup_element:INFO:	Performing Elink synchronization
14:30:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:30:26:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
14:30:26:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
14:30:26:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
14:30:26:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
14:30:26:uplink:INFO:	Enabling uplinks [0]
14:30:26:ST3_emu:INFO:	Number of chips: 1
14:30:26:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
14:30:27:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
 ============== Starting SMX ID burn ==============
14:30:30:asictest:WARNING:	Fused ID is not zero 6359364699117610273
14:30:31:asictest:INFO:	 Starting ADC calibration/scan 
14:30:37:asictest:INFO:	0,	0,	0.000000
14:30:42:asictest:INFO:	1,	40,	0.300000
14:30:48:asictest:INFO:	2,	82,	0.600000
14:30:54:asictest:INFO:	3,	128,	0.900000
14:31:00:asictest:INFO:	4,	177,	1.200000
14:31:06:asictest:INFO:	5,	194,	1.300000
14:31:11:asictest:INFO:	T [C] Vddm[mV] CSA [mV] AUX [mV]
14:31:11:asictest:INFO:	 20.67 1206.80  706.21    0.00
14:31:12:ST3_smx:INFO:	chip: 0-7 	 20.669263 C 	 1206.801105 mV
14:31:12:ST3_smx:INFO:	# loops 0
14:31:14:ST3_smx:INFO:	# loops 1
14:31:16:ST3_smx:INFO:	# loops 2
14:31:17:ST3_smx:INFO:	# loops 3
14:31:19:ST3_smx:INFO:	# loops 4
14:31:21:ST3_smx:INFO:	Total # of broken channels: 0
14:31:21:ST3_smx:INFO:	List of broken channels: []
14:31:21:ST3_smx:INFO:	Total # of broken channels: 0
14:31:21:ST3_smx:INFO:	List of broken channels: []
14:31:22:asictest:INFO:	 Starting CSA scan -
14:31:22:asictest:INFO:	0,	0.066700
14:31:23:asictest:INFO:	9,	0.151600
14:31:24:asictest:INFO:	18,	0.229700
14:31:24:asictest:INFO:	27,	0.304500
14:31:25:asictest:INFO:	36,	0.373100
14:31:26:asictest:INFO:	45,	0.436500
14:31:26:asictest:INFO:	54,	0.489700
14:31:27:asictest:INFO:	63,	0.523300
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_09_13-14_30_16
OPERATOR  : Oleksandr S.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 0789L018-M000 | side-P | index: (1/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
  HW_ADDR : 0x7 | VERS_NO : 2.2
  ASIC_ID : XA-000-08-002-001-006-082-01 | FUSED_ID : 6359364699117610273
  IC_TEMP :   10.59 | VDDM : 1118.14 | AUX_INT :    0.00 | CsaBias :   84.37
  CONF_FAIL_REG : 0
  CSA_BIAS : 15
  THR2_GLB : 30
  ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
  ADC_Chi2/NDF : 1.06477e-05 / 1
  ADC_P0  : 0.00000e+00 ± 3.26308e-03
  ADC_P1  : 7.72870e-03 ± 5.49330e-05
  ADC_P2  : -5.33103e-06 ± 3.20100e-07
  CSA_Chi2/NDF : 1.02411e-04 / 1
  CSA_P0  : 6.39292e-02 ± 3.80897e-03
  CSA_P1  : 1.02239e-02 ± 2.82442e-04
  CSA_P2  : -4.52160e-05 ± 4.31071e-06
---------------------------------------
N_BROKEN_DISC :  0 | N_BROKEN_FAST :  []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.3805', '1.800', '0.1013', '1.801', '0.1519', '6.999', '0.6896']
VI_after__Init : ['1.200', '0.3800', '1.800', '0.1007', '1.800', '0.1496', '7.000', '0.6899']
VI_at__the_End : ['1.200', '0.5233', '1.800', '0.0731', '1.800', '0.1703', '7.000', '0.6900']
14:31:31:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-001-006-082-01//TestDate_2023_09_13-14_30_16/