
XA-000-08-002-001-006-137-09 13.09.23 14:23:45
ADC4

SMX_7

CSA

Calibration
ADC
CSA
Report.txt
14:23:45:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:23:45:ST3_Shared:INFO: -------------------------Microcable------------------------- 14:23:45:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:23:47:smx_tester:INFO: Scanning setup 14:23:47:elinks:INFO: Disabling clock on downlink 0 14:23:47:elinks:INFO: Disabling clock on downlink 1 14:23:47:elinks:INFO: Disabling clock on downlink 2 14:23:47:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:23:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 14:23:47:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0 14:23:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:23:47:elinks:INFO: Disabling clock on downlink 0 14:23:47:elinks:INFO: Disabling clock on downlink 1 14:23:47:elinks:INFO: Disabling clock on downlink 2 14:23:47:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:23:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:23:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:23:47:elinks:INFO: Disabling clock on downlink 0 14:23:47:elinks:INFO: Disabling clock on downlink 1 14:23:47:elinks:INFO: Disabling clock on downlink 2 14:23:47:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:23:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:23:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:23:47:setup_element:INFO: Scanning clock phase 14:23:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 14:23:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 14:23:48:setup_element:INFO: Clock phase scan results for group 0, downlink 0 14:23:48:setup_element:INFO: Eye window for uplink 0 : ____________________________________________________XXXXX_______________________ Clock Delay: 14 14:23:48:setup_element:INFO: Setting the clock phase to 14 for group 0, downlink 0 14:23:48:setup_element:INFO: Scanning data phases 14:23:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 14:23:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 14:23:53:setup_element:INFO: Data phase scan results for group 0, downlink 0 14:23:53:setup_element:INFO: Eye window for uplink 0 : ___XXX__________________________________ Data delay found: 24 14:23:53:setup_element:INFO: Setting the data phase to 24 for uplink 0 14:23:53:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 0 Uplinks: [0] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 14 Window Length: 75 Eye Windows: Uplink 0: ____________________________________________________XXXXX_______________________ Data phase characteristics: Uplink 0: Optimal Phase: 24 Window Length: 37 Eye Window: ___XXX__________________________________ ] 14:23:53:setup_element:INFO: Beginning SMX ASICs map scan 14:23:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 14:23:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 14:23:53:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 14:23:53:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 14:23:53:uplink:INFO: Setting uplinks mask [0] 14:23:54:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0 14:23:55:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 0 Uplinks: [0] ASICs Map: ASIC address 0x7: (ASIC uplink, uplink): (0, 0) Clock Phase Characteristic: Optimal Phase: 14 Window Length: 75 Eye Windows: Uplink 0: ____________________________________________________XXXXX_______________________ Data phase characteristics: Uplink 0: Optimal Phase: 24 Window Length: 37 Eye Window: ___XXX__________________________________ 14:23:55:setup_element:INFO: Performing Elink synchronization 14:23:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 14:23:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 14:23:55:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 14:23:55:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 14:23:55:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0 14:23:55:uplink:INFO: Enabling uplinks [0] 14:23:56:ST3_emu:INFO: Number of chips: 1 14:23:56:ST3_emu:INFO: Chip address: 0x7 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7 14:23:57:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values ============== Starting SMX ID burn ============== 14:24:00:asictest:WARNING: Fused ID is not zero 6359364699117611161 14:24:01:asictest:INFO: Starting ADC calibration/scan 14:24:06:asictest:INFO: 0, 0, 0.000000 14:24:12:asictest:INFO: 1, 39, 0.300000 14:24:18:asictest:INFO: 2, 77, 0.600000 14:24:24:asictest:INFO: 3, 120, 0.900000 14:24:29:asictest:INFO: 4, 166, 1.200000 14:24:35:asictest:INFO: 5, 182, 1.300000 14:24:41:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV] 14:24:41:asictest:INFO: 18.96 1200.64 768.38 0.00 14:24:42:ST3_smx:INFO: chip: 0-7 18.962313 C 1200.639485 mV 14:24:42:ST3_smx:INFO: # loops 0 14:24:44:ST3_smx:INFO: # loops 1 14:24:45:ST3_smx:INFO: # loops 2 14:24:47:ST3_smx:INFO: # loops 3 14:24:48:ST3_smx:INFO: # loops 4 14:24:50:ST3_smx:INFO: Total # of broken channels: 0 14:24:50:ST3_smx:INFO: List of broken channels: [] 14:24:50:ST3_smx:INFO: Total # of broken channels: 0 14:24:50:ST3_smx:INFO: List of broken channels: [] 14:24:51:asictest:INFO: Starting CSA scan - 14:24:52:asictest:INFO: 0, 0.067700 14:24:53:asictest:INFO: 9, 0.151400 14:24:53:asictest:INFO: 18, 0.227500 14:24:54:asictest:INFO: 27, 0.301300 14:24:55:asictest:INFO: 36, 0.369100 14:24:55:asictest:INFO: 45, 0.431300 14:24:56:asictest:INFO: 54, 0.481500 14:24:56:asictest:INFO: 63, 0.511400 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : Microcable TEST_DATE : 2023_09_13-14_23_45 OPERATOR : Oleksandr S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : 0793L018-M001 | side-P | index: (8/8) --------------------------------------- --------------------------------------- ASIC_CONFIG_PARAMETERS HW_ADDR : 0x7 | VERS_NO : 2.2 ASIC_ID : XA-000-08-002-001-006-137-09 | FUSED_ID : 6359364699117611161 IC_TEMP : 8.23 | VDDM : 1124.51 | AUX_INT : 0.00 | CsaBias : 113.53 CONF_FAIL_REG : 0 CSA_BIAS : 15 THR2_GLB : 30 ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122 ADC_Chi2/NDF : 6.48325e-07 / 0 ADC_P0 : 0.00000e+00 ± 1.00000e+00 ADC_P1 : 8.19026e-03 ± 2.66460e-02 ADC_P2 : -5.76804e-06 ± 1.60713e-04 CSA_Chi2/NDF : 1.38347e-04 / 0 CSA_P0 : 6.44250e-02 ± 4.42710e-03 CSA_P1 : 1.01612e-02 ± 3.28278e-04 CSA_P2 : -4.71634e-05 ± 5.01027e-06 --------------------------------------- N_BROKEN_DISC : 0 | N_BROKEN_FAST : [] N_BROKEN_CABLE : 0 LIST_OF_BROKEN_CABLES : [] --------------------------------------- VI_before_Init : ['1.199', '0.4170', '1.800', '0.1007', '1.800', '0.1651', '7.000', '0.6898'] VI_after__Init : ['1.200', '0.4195', '1.800', '0.1013', '1.800', '0.1612', '7.000', '0.6898'] VI_at__the_End : ['1.200', '0.5152', '1.800', '0.0726', '1.800', '0.1709', '7.000', '0.6901'] 14:25:00:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-001-006-137-09//TestDate_2023_09_13-14_23_45/