XA-000-08-002-001-006-222-11    01.09.23 09:31:11

ADC4
cADCscan.png
SMX_7
SMX_7.png
CSA
cCSAscan.png
Calibration
ADC
p0.svg
p1.svg
CSA
p0.svg
p2.svg
p1.svg
Report.txt
            09:31:11:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:31:11:ST3_Shared:INFO:	-------------------------Microcable-------------------------
09:31:11:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:31:13:smx_tester:INFO:	Scanning setup
09:31:13:elinks:INFO:	Disabling clock on downlink 0
09:31:13:elinks:INFO:	Disabling clock on downlink 1
09:31:13:elinks:INFO:	Disabling clock on downlink 2
09:31:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:31:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:31:13:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 0
09:31:13:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:31:13:elinks:INFO:	Disabling clock on downlink 0
09:31:13:elinks:INFO:	Disabling clock on downlink 1
09:31:13:elinks:INFO:	Disabling clock on downlink 2
09:31:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:31:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:31:13:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:31:13:elinks:INFO:	Disabling clock on downlink 0
09:31:13:elinks:INFO:	Disabling clock on downlink 1
09:31:13:elinks:INFO:	Disabling clock on downlink 2
09:31:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:31:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:31:13:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:31:13:setup_element:INFO:	Scanning clock phase
09:31:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:31:13:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:31:13:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
09:31:13:setup_element:INFO:	Eye window for uplink 0 : _____________________________________________________XXXXXXX____________________
Clock Delay: 16
09:31:13:setup_element:INFO:	Setting the clock phase to 16 for group 0, downlink 0
09:31:13:setup_element:INFO:	Scanning data phases
09:31:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:31:13:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:31:18:setup_element:INFO:	Data phase scan results for group 0, downlink 0
09:31:18:setup_element:INFO:	Eye window for uplink 0 : ____XXXX________________________________
Data delay found: 25
09:31:18:setup_element:INFO:	Setting the data phase to 25 for uplink 0
09:31:18:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 16
    Window Length: 73
    Eye Windows:
      Uplink  0: _____________________________________________________XXXXXXX____________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 25
      Window Length: 36
      Eye Window: ____XXXX________________________________
]
09:31:18:setup_element:INFO:	Beginning SMX ASICs map scan
09:31:18:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:31:18:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:31:18:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
09:31:18:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
09:31:18:uplink:INFO:	Setting uplinks mask [0]
09:31:20:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 0
09:31:21:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map:
    ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
  Clock Phase Characteristic:
    Optimal Phase: 16
    Window Length: 73
    Eye Windows:
      Uplink  0: _____________________________________________________XXXXXXX____________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 25
      Window Length: 36
      Eye Window: ____XXXX________________________________

09:31:21:setup_element:INFO:	Performing Elink synchronization
09:31:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:31:21:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:31:21:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
09:31:21:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
09:31:21:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
09:31:21:uplink:INFO:	Enabling uplinks [0]
09:31:21:ST3_emu:INFO:	Number of chips: 1
09:31:21:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
09:31:22:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
 ============== Starting SMX ID burn ==============
09:31:26:asictest:WARNING:	Fused ID is not zero 6359364699117612523
09:31:26:asictest:INFO:	 Starting ADC calibration/scan 
09:31:32:asictest:INFO:	0,	0,	0.000000
09:31:38:asictest:INFO:	1,	41,	0.300000
09:31:43:asictest:INFO:	2,	81,	0.600000
09:31:49:asictest:INFO:	3,	126,	0.900000
09:31:55:asictest:INFO:	4,	174,	1.200000
09:32:01:asictest:INFO:	5,	190,	1.300000
09:32:06:asictest:INFO:	T [C] Vddm[mV] CSA [mV] AUX [mV]
09:32:07:asictest:INFO:	 16.57 1202.49  822.48    0.00
09:32:08:ST3_smx:INFO:	chip: 0-7 	 16.567865 C 	 1202.492003 mV
09:32:08:ST3_smx:INFO:	# loops 0
09:32:10:ST3_smx:INFO:	# loops 1
09:32:11:ST3_smx:INFO:	# loops 2
09:32:13:ST3_smx:INFO:	# loops 3
09:32:14:ST3_smx:INFO:	# loops 4
09:32:16:ST3_smx:INFO:	Total # of broken channels: 0
09:32:16:ST3_smx:INFO:	List of broken channels: []
09:32:16:ST3_smx:INFO:	Total # of broken channels: 0
09:32:16:ST3_smx:INFO:	List of broken channels: []
09:32:17:asictest:INFO:	 Starting CSA scan -
09:32:18:asictest:INFO:	0,	0.062600
09:32:18:asictest:INFO:	9,	0.141800
09:32:19:asictest:INFO:	18,	0.214900
09:32:20:asictest:INFO:	27,	0.284800
09:32:20:asictest:INFO:	36,	0.354900
09:32:21:asictest:INFO:	45,	0.418800
09:32:22:asictest:INFO:	54,	0.476300
09:32:23:asictest:INFO:	63,	0.519600
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_09_01-09_31_11
OPERATOR  : Olga B.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 0000L000-M000 | side-P | index: (7/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
  HW_ADDR : 0x7 | VERS_NO : 2.2
  ASIC_ID : XA-000-08-002-001-006-222-11 | FUSED_ID : 6359364699117612523
  IC_TEMP :    6.32 | VDDM : 1110.91 | AUX_INT :    0.00 | CsaBias :  115.74
  CONF_FAIL_REG : 0
  CSA_BIAS : 15
  THR2_GLB : 30
  ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
  ADC_Chi2/NDF : 1.78780e-05 / 1
  ADC_P0  : 0.00000e+00 ± 4.22824e-03
  ADC_P1  : 7.79215e-03 ± 7.28254e-05
  ADC_P2  : -5.06479e-06 ± 4.32770e-07
  CSA_Chi2/NDF : 6.54239e-05 / 1
  CSA_P0  : 6.09042e-02 ± 3.04440e-03
  CSA_P1  : 9.22573e-03 ± 2.25748e-04
  CSA_P2  : -2.98427e-05 ± 3.44543e-06
---------------------------------------
N_BROKEN_DISC :  0 | N_BROKEN_FAST :  []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.1272', '1.800', '0.1034', '1.800', '0.1445', '7.000', '0.6888']
VI_after__Init : ['1.200', '0.1277', '1.800', '0.1033', '1.800', '0.1444', '7.000', '0.6900']
VI_at__the_End : ['1.200', '0.5181', '1.800', '0.0727', '1.800', '0.1627', '7.000', '0.6899']
09:32:26:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-001-006-222-11//TestDate_2023_09_01-09_31_11/

          
Comment.txt
J076, UK module