XA-000-08-002-001-006-224-02 01.09.23 09:32:56
ADC4
SMX_7
CSA
Calibration
ADC
CSA
Info
09:32:56:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:32:56:ST3_Shared:INFO: -------------------------Microcable-------------------------
09:32:56:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:32:58:smx_tester:INFO: Scanning setup
09:32:58:elinks:INFO: Disabling clock on downlink 0
09:32:58:elinks:INFO: Disabling clock on downlink 1
09:32:58:elinks:INFO: Disabling clock on downlink 2
09:32:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:32:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:32:58:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
09:32:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:32:58:elinks:INFO: Disabling clock on downlink 0
09:32:58:elinks:INFO: Disabling clock on downlink 1
09:32:58:elinks:INFO: Disabling clock on downlink 2
09:32:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:32:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:32:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:32:58:elinks:INFO: Disabling clock on downlink 0
09:32:58:elinks:INFO: Disabling clock on downlink 1
09:32:58:elinks:INFO: Disabling clock on downlink 2
09:32:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:32:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:32:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:32:58:setup_element:INFO: Scanning clock phase
09:32:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:32:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:32:58:setup_element:INFO: Clock phase scan results for group 0, downlink 0
09:32:58:setup_element:INFO: Eye window for uplink 0 : _____________________________________________________XXXXXX_____________________
Clock Delay: 15
09:32:58:setup_element:INFO: Setting the clock phase to 15 for group 0, downlink 0
09:32:58:setup_element:INFO: Scanning data phases
09:32:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:32:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:33:03:setup_element:INFO: Data phase scan results for group 0, downlink 0
09:33:03:setup_element:INFO: Eye window for uplink 0 : ___XXXX_________________________________
Data delay found: 24
09:33:03:setup_element:INFO: Setting the data phase to 24 for uplink 0
09:33:03:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 15
Window Length: 74
Eye Windows:
Uplink 0: _____________________________________________________XXXXXX_____________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 24
Window Length: 36
Eye Window: ___XXXX_________________________________
]
09:33:03:setup_element:INFO: Beginning SMX ASICs map scan
09:33:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:33:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:33:03:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
09:33:03:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
09:33:03:uplink:INFO: Setting uplinks mask [0]
09:33:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0
09:33:06:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map:
ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
Clock Phase Characteristic:
Optimal Phase: 15
Window Length: 74
Eye Windows:
Uplink 0: _____________________________________________________XXXXXX_____________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 24
Window Length: 36
Eye Window: ___XXXX_________________________________
09:33:06:setup_element:INFO: Performing Elink synchronization
09:33:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:33:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:33:06:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
09:33:06:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
09:33:06:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
09:33:06:uplink:INFO: Enabling uplinks [0]
09:33:06:ST3_emu:INFO: Number of chips: 1
09:33:06:ST3_emu:INFO: Chip address: 0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
09:33:07:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
============== Starting SMX ID burn ==============
09:33:10:asictest:WARNING: Fused ID is not zero 6359364699117612546
09:33:11:asictest:INFO: Starting ADC calibration/scan
09:33:17:asictest:INFO: 0, 0, 0.000000
09:33:22:asictest:INFO: 1, 40, 0.300000
09:33:28:asictest:INFO: 2, 79, 0.600000
09:33:34:asictest:INFO: 3, 123, 0.900000
09:33:40:asictest:INFO: 4, 170, 1.200000
09:33:46:asictest:INFO: 5, 186, 1.300000
09:33:51:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV]
09:33:52:asictest:INFO: 13.16 1195.28 791.42 0.00
09:33:53:ST3_smx:INFO: chip: 0-7 13.159648 C 1189.084349 mV
09:33:53:ST3_smx:INFO: # loops 0
09:33:55:ST3_smx:INFO: # loops 1
09:33:56:ST3_smx:INFO: # loops 2
09:33:58:ST3_smx:INFO: # loops 3
09:33:59:ST3_smx:INFO: # loops 4
09:34:01:ST3_smx:INFO: Total # of broken channels: 0
09:34:01:ST3_smx:INFO: List of broken channels: []
09:34:01:ST3_smx:INFO: Total # of broken channels: 0
09:34:01:ST3_smx:INFO: List of broken channels: []
09:34:02:asictest:INFO: Starting CSA scan -
09:34:03:asictest:INFO: 0, 0.065400
09:34:03:asictest:INFO: 9, 0.145100
09:34:04:asictest:INFO: 18, 0.218600
09:34:05:asictest:INFO: 27, 0.290500
09:34:05:asictest:INFO: 36, 0.356400
09:34:06:asictest:INFO: 45, 0.417100
09:34:07:asictest:INFO: 54, 0.467700
09:34:07:asictest:INFO: 63, 0.499100
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_09_01-09_32_56
OPERATOR : Olga B.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID : 0000L000-M000 | side-P | index: (8/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
HW_ADDR : 0x7 | VERS_NO : 2.2
ASIC_ID : XA-000-08-002-001-006-224-02 | FUSED_ID : 6359364699117612546
IC_TEMP : 2.69 | VDDM : 1101.25 | AUX_INT : 0.00 | CsaBias : 110.35
CONF_FAIL_REG : 0
CSA_BIAS : 15
THR2_GLB : 30
ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
ADC_Chi2/NDF : 3.40607e-06 / 0
ADC_P0 : 0.00000e+00 ± 1.00000e+00
ADC_P1 : 7.95526e-03 ± 2.61785e-02
ADC_P2 : -5.22246e-06 ± 1.54375e-04
CSA_Chi2/NDF : 1.19674e-04 / 0
CSA_P0 : 6.21708e-02 ± 4.11750e-03
CSA_P1 : 9.69689e-03 ± 3.05320e-04
CSA_P2 : -4.24236e-05 ± 4.65988e-06
---------------------------------------
N_BROKEN_DISC : 0 | N_BROKEN_FAST : []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.2822', '1.800', '0.1044', '1.800', '0.1439', '7.000', '0.6890']
VI_after__Init : ['1.200', '0.2829', '1.800', '0.1029', '1.800', '0.1426', '7.000', '0.6899']
VI_at__the_End : ['1.200', '0.5023', '1.800', '0.0735', '1.800', '0.1720', '7.000', '0.6898']
09:34:42:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-001-006-224-02//TestDate_2023_09_01-09_32_56/
Comment
J076, UK module