XA-000-08-002-001-006-225-02 23.08.23 11:08:45
ADC4
SMX_7
CSA
Calibration
ADC
CSA
Info
11:08:45:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:08:45:ST3_Shared:INFO: -------------------------Microcable-------------------------
11:08:45:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:08:47:smx_tester:INFO: Scanning setup
11:08:47:elinks:INFO: Disabling clock on downlink 0
11:08:47:elinks:INFO: Disabling clock on downlink 1
11:08:47:elinks:INFO: Disabling clock on downlink 2
11:08:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:08:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:08:47:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
11:08:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:08:47:elinks:INFO: Disabling clock on downlink 0
11:08:47:elinks:INFO: Disabling clock on downlink 1
11:08:47:elinks:INFO: Disabling clock on downlink 2
11:08:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:08:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:08:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:08:47:elinks:INFO: Disabling clock on downlink 0
11:08:47:elinks:INFO: Disabling clock on downlink 1
11:08:47:elinks:INFO: Disabling clock on downlink 2
11:08:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:08:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:08:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:08:48:setup_element:INFO: Scanning clock phase
11:08:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:08:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:08:48:setup_element:INFO: Clock phase scan results for group 0, downlink 0
11:08:48:setup_element:INFO: Eye window for uplink 0 : _____________________________________________________XXXXXX_____________________
Clock Delay: 15
11:08:48:setup_element:INFO: Setting the clock phase to 15 for group 0, downlink 0
11:08:48:setup_element:INFO: Scanning data phases
11:08:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:08:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:08:53:setup_element:INFO: Data phase scan results for group 0, downlink 0
11:08:53:setup_element:INFO: Eye window for uplink 0 : ____XXXX________________________________
Data delay found: 25
11:08:53:setup_element:INFO: Setting the data phase to 25 for uplink 0
11:08:53:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 15
Window Length: 74
Eye Windows:
Uplink 0: _____________________________________________________XXXXXX_____________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 25
Window Length: 36
Eye Window: ____XXXX________________________________
]
11:08:53:setup_element:INFO: Beginning SMX ASICs map scan
11:08:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:08:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:08:53:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
11:08:53:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
11:08:53:uplink:INFO: Setting uplinks mask [0]
11:08:54:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0
11:08:56:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map:
ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
Clock Phase Characteristic:
Optimal Phase: 15
Window Length: 74
Eye Windows:
Uplink 0: _____________________________________________________XXXXXX_____________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 25
Window Length: 36
Eye Window: ____XXXX________________________________
11:08:56:setup_element:INFO: Performing Elink synchronization
11:08:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:08:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
11:08:56:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
11:08:56:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
11:08:56:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
11:08:56:uplink:INFO: Enabling uplinks [0]
11:08:56:ST3_emu:INFO: Number of chips: 1
11:08:56:ST3_emu:INFO: Chip address: 0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
11:08:57:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
============== Starting SMX ID burn ==============
11:09:00:asictest:WARNING: Fused ID is not zero 6359364699117612562
11:09:01:asictest:INFO: Starting ADC calibration/scan
11:09:06:asictest:INFO: 0, 0, 0.000000
11:09:12:asictest:INFO: 1, 41, 0.300000
11:09:18:asictest:INFO: 2, 80, 0.600000
11:09:24:asictest:INFO: 3, 126, 0.900000
11:09:30:asictest:INFO: 4, 174, 1.200000
11:09:35:asictest:INFO: 5, 190, 1.300000
11:09:41:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV]
11:09:41:asictest:INFO: 18.03 1202.82 832.71 0.00
11:09:43:ST3_smx:INFO: chip: 0-7 18.031642 C 1202.815138 mV
11:09:43:ST3_smx:INFO: # loops 0
11:09:45:ST3_smx:INFO: # loops 1
11:09:46:ST3_smx:INFO: # loops 2
11:09:48:ST3_smx:INFO: # loops 3
11:09:49:ST3_smx:INFO: # loops 4
11:09:51:ST3_smx:INFO: Total # of broken channels: 0
11:09:51:ST3_smx:INFO: List of broken channels: []
11:09:51:ST3_smx:INFO: Total # of broken channels: 0
11:09:51:ST3_smx:INFO: List of broken channels: []
11:09:52:asictest:INFO: Starting CSA scan -
11:09:53:asictest:INFO: 0, 0.065900
11:09:54:asictest:INFO: 9, 0.148600
11:09:54:asictest:INFO: 18, 0.224600
11:09:55:asictest:INFO: 27, 0.297400
11:09:56:asictest:INFO: 36, 0.371100
11:09:56:asictest:INFO: 45, 0.439500
11:09:57:asictest:INFO: 54, 0.499800
11:09:58:asictest:INFO: 63, 0.542500
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_08_23-11_08_45
OPERATOR : Kerstin S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID : 0000L000-M000 | side-P | index: (6/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
HW_ADDR : 0x7 | VERS_NO : 2.2
ASIC_ID : XA-000-08-002-001-006-225-02 | FUSED_ID : 6359364699117612562
IC_TEMP : 11.19 | VDDM : 1118.50 | AUX_INT : 0.00 | CsaBias : 124.67
CONF_FAIL_REG : 0
CSA_BIAS : 15
THR2_GLB : 30
ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
ADC_Chi2/NDF : 6.82376e-05 / 1
ADC_P0 : 0.00000e+00 ± 8.26061e-03
ADC_P1 : 7.88065e-03 ± 1.42389e-04
ADC_P2 : -5.56276e-06 ± 8.45739e-07
CSA_Chi2/NDF : 1.15382e-04 / 1
CSA_P0 : 6.37500e-02 ± 4.04300e-03
CSA_P1 : 9.66561e-03 ± 2.99796e-04
CSA_P2 : -3.14227e-05 ± 4.57557e-06
---------------------------------------
N_BROKEN_DISC : 0 | N_BROKEN_FAST : []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.3154', '1.800', '0.1006', '1.800', '0.1475', '7.000', '0.6894']
VI_after__Init : ['1.200', '0.3159', '1.800', '0.0995', '1.800', '0.1468', '7.000', '0.6906']
VI_at__the_End : ['1.200', '0.5411', '1.800', '0.0717', '1.800', '0.1605', '7.000', '0.6905']
11:10:07:ST3_Shared:INFO: /home/cbm/public_html/Test_LogDir/Microcable/XA-000-08-002-001-006-225-02//TestDate_2023_08_23-11_08_45/
Comment
J038 for test module, Pside