XA-000-08-002-001-006-228-02    01.09.23 09:14:31

ADC4
cADCscan.png
SMX_7
SMX_7.png
CSA
cCSAscan.png
Calibration
ADC
p0.svg
p1.svg
CSA
p0.svg
p2.svg
p1.svg
Report.txt
            09:14:31:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:14:31:ST3_Shared:INFO:	-------------------------Microcable-------------------------
09:14:31:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:14:33:smx_tester:INFO:	Scanning setup
09:14:33:elinks:INFO:	Disabling clock on downlink 0
09:14:33:elinks:INFO:	Disabling clock on downlink 1
09:14:33:elinks:INFO:	Disabling clock on downlink 2
09:14:33:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:14:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:14:33:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 0
09:14:33:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:14:33:elinks:INFO:	Disabling clock on downlink 0
09:14:33:elinks:INFO:	Disabling clock on downlink 1
09:14:33:elinks:INFO:	Disabling clock on downlink 2
09:14:33:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:14:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:14:33:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:14:33:elinks:INFO:	Disabling clock on downlink 0
09:14:33:elinks:INFO:	Disabling clock on downlink 1
09:14:33:elinks:INFO:	Disabling clock on downlink 2
09:14:33:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:14:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:14:33:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:14:33:setup_element:INFO:	Scanning clock phase
09:14:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:14:33:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:14:33:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
09:14:33:setup_element:INFO:	Eye window for uplink 0 : ___________________________________________________XXXXXX_______________________
Clock Delay: 13
09:14:33:setup_element:INFO:	Setting the clock phase to 13 for group 0, downlink 0
09:14:33:setup_element:INFO:	Scanning data phases
09:14:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:14:34:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:14:38:setup_element:INFO:	Data phase scan results for group 0, downlink 0
09:14:38:setup_element:INFO:	Eye window for uplink 0 : ____XXXX________________________________
Data delay found: 25
09:14:38:setup_element:INFO:	Setting the data phase to 25 for uplink 0
09:14:38:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 13
    Window Length: 74
    Eye Windows:
      Uplink  0: ___________________________________________________XXXXXX_______________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 25
      Window Length: 36
      Eye Window: ____XXXX________________________________
]
09:14:38:setup_element:INFO:	Beginning SMX ASICs map scan
09:14:38:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:14:38:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:14:39:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
09:14:39:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
09:14:39:uplink:INFO:	Setting uplinks mask [0]
09:14:40:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 0
09:14:41:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map:
    ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
  Clock Phase Characteristic:
    Optimal Phase: 13
    Window Length: 74
    Eye Windows:
      Uplink  0: ___________________________________________________XXXXXX_______________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 25
      Window Length: 36
      Eye Window: ____XXXX________________________________

09:14:41:setup_element:INFO:	Performing Elink synchronization
09:14:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:14:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:14:41:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
09:14:41:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
09:14:41:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
09:14:41:uplink:INFO:	Enabling uplinks [0]
09:14:41:ST3_emu:INFO:	Number of chips: 1
09:14:41:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
09:14:42:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
 ============== Starting SMX ID burn ==============
09:14:46:asictest:WARNING:	Fused ID is not zero 6359364699117612610
09:14:46:asictest:INFO:	 Starting ADC calibration/scan 
09:14:52:asictest:INFO:	0,	0,	0.000000
09:14:58:asictest:INFO:	1,	41,	0.300000
09:15:03:asictest:INFO:	2,	80,	0.600000
09:15:09:asictest:INFO:	3,	125,	0.900000
09:15:15:asictest:INFO:	4,	173,	1.199000
09:15:21:asictest:INFO:	5,	190,	1.300000
09:15:26:asictest:INFO:	T [C] Vddm[mV] CSA [mV] AUX [mV]
09:15:27:asictest:INFO:	  9.45 1199.79  829.73    0.00
09:15:28:ST3_smx:INFO:	chip: 0-7 	 9.453763 C 	 1199.791972 mV
09:15:28:ST3_smx:INFO:	# loops 0
09:15:30:ST3_smx:INFO:	# loops 1
09:15:31:ST3_smx:INFO:	# loops 2
09:15:33:ST3_smx:INFO:	# loops 3
09:15:34:ST3_smx:INFO:	# loops 4
09:15:36:ST3_smx:INFO:	Total # of broken channels: 0
09:15:36:ST3_smx:INFO:	List of broken channels: []
09:15:36:ST3_smx:INFO:	Total # of broken channels: 0
09:15:36:ST3_smx:INFO:	List of broken channels: []
09:15:37:asictest:INFO:	 Starting CSA scan -
09:15:38:asictest:INFO:	0,	0.064000
09:15:38:asictest:INFO:	9,	0.142200
09:15:39:asictest:INFO:	18,	0.215200
09:15:40:asictest:INFO:	27,	0.285500
09:15:40:asictest:INFO:	36,	0.355300
09:15:41:asictest:INFO:	45,	0.418500
09:15:42:asictest:INFO:	54,	0.473600
09:15:42:asictest:INFO:	63,	0.511300
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_09_01-09_14_31
OPERATOR  : Olga B.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 0000L000-M000 | side-P | index: (2/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
  HW_ADDR : 0x7 | VERS_NO : 2.2
  ASIC_ID : XA-000-08-002-001-006-228-02 | FUSED_ID : 6359364699117612610
  IC_TEMP :   -0.79 | VDDM : 1109.55 | AUX_INT :    0.00 | CsaBias :  117.81
  CONF_FAIL_REG : 0
  CSA_BIAS : 15
  THR2_GLB : 30
  ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
  ADC_Chi2/NDF : 8.71331e-06 / 1
  ADC_P0  : 0.00000e+00 ± 2.95183e-03
  ADC_P1  : 7.94121e-03 ± 5.06780e-05
  ADC_P2  : -5.81503e-06 ± 3.01727e-07
  CSA_Chi2/NDF : 1.16238e-04 / 1
  CSA_P0  : 6.11167e-02 ± 4.05795e-03
  CSA_P1  : 9.37235e-03 ± 3.00905e-04
  CSA_P2  : -3.39653e-05 ± 4.59249e-06
---------------------------------------
N_BROKEN_DISC :  0 | N_BROKEN_FAST :  []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.4076', '1.800', '0.0951', '1.800', '0.1461', '7.000', '0.6899']
VI_after__Init : ['1.200', '0.3814', '1.800', '0.0949', '1.800', '0.1417', '7.000', '0.6899']
VI_at__the_End : ['1.200', '0.5100', '1.800', '0.0700', '1.800', '0.1671', '7.000', '0.6897']
09:19:07:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-001-006-228-02//TestDate_2023_09_01-09_14_31/

          
Comment.txt
J076, UK module