XA-000-08-002-001-006-230-02    01.09.23 09:21:13

ADC4
cADCscan.png
SMX_7
SMX_7.png
CSA
cCSAscan.png
Calibration
ADC
p0.svg
p1.svg
CSA
p0.svg
p2.svg
p1.svg
Report.txt
            09:21:13:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:21:13:ST3_Shared:INFO:	-------------------------Microcable-------------------------
09:21:13:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:21:14:smx_tester:INFO:	Scanning setup
09:21:14:elinks:INFO:	Disabling clock on downlink 0
09:21:14:elinks:INFO:	Disabling clock on downlink 1
09:21:14:elinks:INFO:	Disabling clock on downlink 2
09:21:14:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:21:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:21:14:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 0
09:21:14:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:21:14:elinks:INFO:	Disabling clock on downlink 0
09:21:14:elinks:INFO:	Disabling clock on downlink 1
09:21:14:elinks:INFO:	Disabling clock on downlink 2
09:21:14:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:21:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:21:15:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:21:15:elinks:INFO:	Disabling clock on downlink 0
09:21:15:elinks:INFO:	Disabling clock on downlink 1
09:21:15:elinks:INFO:	Disabling clock on downlink 2
09:21:15:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:21:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:21:15:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:21:15:setup_element:INFO:	Scanning clock phase
09:21:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:21:15:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:21:15:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
09:21:15:setup_element:INFO:	Eye window for uplink 0 : _____________________________________________________XXXXXXX____________________
Clock Delay: 16
09:21:15:setup_element:INFO:	Setting the clock phase to 16 for group 0, downlink 0
09:21:15:setup_element:INFO:	Scanning data phases
09:21:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:21:15:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:21:20:setup_element:INFO:	Data phase scan results for group 0, downlink 0
09:21:20:setup_element:INFO:	Eye window for uplink 0 : ___XXXX_________________________________
Data delay found: 24
09:21:20:setup_element:INFO:	Setting the data phase to 24 for uplink 0
09:21:20:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 16
    Window Length: 73
    Eye Windows:
      Uplink  0: _____________________________________________________XXXXXXX____________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 24
      Window Length: 36
      Eye Window: ___XXXX_________________________________
]
09:21:20:setup_element:INFO:	Beginning SMX ASICs map scan
09:21:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:21:20:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:21:20:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
09:21:20:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
09:21:20:uplink:INFO:	Setting uplinks mask [0]
09:21:21:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 0
09:21:23:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map:
    ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
  Clock Phase Characteristic:
    Optimal Phase: 16
    Window Length: 73
    Eye Windows:
      Uplink  0: _____________________________________________________XXXXXXX____________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 24
      Window Length: 36
      Eye Window: ___XXXX_________________________________

09:21:23:setup_element:INFO:	Performing Elink synchronization
09:21:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:21:23:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:21:23:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
09:21:23:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
09:21:23:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
09:21:23:uplink:INFO:	Enabling uplinks [0]
09:21:23:ST3_emu:INFO:	Number of chips: 1
09:21:23:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
09:21:24:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
 ============== Starting SMX ID burn ==============
09:21:27:asictest:WARNING:	Fused ID is not zero 6359364699117612642
09:21:28:asictest:INFO:	 Starting ADC calibration/scan 
09:21:34:asictest:INFO:	0,	0,	0.000000
09:21:39:asictest:INFO:	1,	39,	0.300000
09:21:45:asictest:INFO:	2,	78,	0.600000
09:21:51:asictest:INFO:	3,	123,	0.900000
09:21:57:asictest:INFO:	4,	172,	1.200000
09:22:02:asictest:INFO:	5,	189,	1.300000
09:22:08:asictest:INFO:	T [C] Vddm[mV] CSA [mV] AUX [mV]
09:22:08:asictest:INFO:	  4.23 1201.58  677.91    0.00
09:22:09:ST3_smx:INFO:	chip: 0-7 	 4.232832 C 	 1195.734282 mV
09:22:09:ST3_smx:INFO:	# loops 0
09:22:11:ST3_smx:INFO:	# loops 1
09:22:13:ST3_smx:INFO:	# loops 2
09:22:14:ST3_smx:INFO:	# loops 3
09:22:16:ST3_smx:INFO:	# loops 4
09:22:18:ST3_smx:INFO:	Total # of broken channels: 0
09:22:18:ST3_smx:INFO:	List of broken channels: []
09:22:18:ST3_smx:INFO:	Total # of broken channels: 0
09:22:18:ST3_smx:INFO:	List of broken channels: []
09:22:19:asictest:INFO:	 Starting CSA scan -
09:22:20:asictest:INFO:	0,	0.066100
09:22:20:asictest:INFO:	9,	0.148100
09:22:21:asictest:INFO:	18,	0.223800
09:22:21:asictest:INFO:	27,	0.295200
09:22:22:asictest:INFO:	36,	0.360900
09:22:23:asictest:INFO:	45,	0.421800
09:22:24:asictest:INFO:	54,	0.471000
09:22:24:asictest:INFO:	63,	0.500500
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_09_01-09_21_13
OPERATOR  : Olga B.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 0000L000-M000 | side-P | index: (3/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
  HW_ADDR : 0x7 | VERS_NO : 2.2
  ASIC_ID : XA-000-08-002-001-006-230-02 | FUSED_ID : 6359364699117612642
  IC_TEMP :   -6.06 | VDDM : 1106.44 | AUX_INT :    0.00 | CsaBias :   96.63
  CONF_FAIL_REG : 0
  CSA_BIAS : 15
  THR2_GLB : 30
  ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
  ADC_Chi2/NDF : 3.96370e-06 / 0
  ADC_P0  : 0.00000e+00 ± 1.00000e+00
  ADC_P1  : 8.13205e-03 ± 2.52466e-02
  ADC_P2  : -6.66346e-06 ± 1.46766e-04
  CSA_Chi2/NDF : 1.15082e-04 / 0
  CSA_P0  : 6.31333e-02 ± 4.03774e-03
  CSA_P1  : 9.95635e-03 ± 2.99406e-04
  CSA_P2  : -4.64433e-05 ± 4.56962e-06
---------------------------------------
N_BROKEN_DISC :  0 | N_BROKEN_FAST :  []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.1421', '1.800', '0.0715', '1.800', '0.1386', '6.999', '0.6888']
VI_after__Init : ['1.200', '0.1426', '1.800', '0.0716', '1.800', '0.1381', '7.000', '0.6898']
VI_at__the_End : ['1.200', '0.5077', '1.800', '0.0728', '1.800', '0.1767', '7.000', '0.6896']
09:22:28:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-001-006-230-02//TestDate_2023_09_01-09_21_13/

          
Comment.txt
J076, UK module