XA-000-08-002-001-006-231-02 01.09.23 08:56:35
ADC4
SMX_7
CSA
Calibration
ADC
CSA
Info
08:56:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:56:35:ST3_Shared:INFO: -------------------------Microcable-------------------------
08:56:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:56:37:smx_tester:INFO: Scanning setup
08:56:37:elinks:INFO: Disabling clock on downlink 0
08:56:37:elinks:INFO: Disabling clock on downlink 1
08:56:37:elinks:INFO: Disabling clock on downlink 2
08:56:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:56:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:56:37:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
08:56:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:56:37:elinks:INFO: Disabling clock on downlink 0
08:56:37:elinks:INFO: Disabling clock on downlink 1
08:56:37:elinks:INFO: Disabling clock on downlink 2
08:56:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:56:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:56:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:56:37:elinks:INFO: Disabling clock on downlink 0
08:56:37:elinks:INFO: Disabling clock on downlink 1
08:56:37:elinks:INFO: Disabling clock on downlink 2
08:56:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:56:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:56:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:56:37:setup_element:INFO: Scanning clock phase
08:56:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:56:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
08:56:37:setup_element:INFO: Clock phase scan results for group 0, downlink 0
08:56:37:setup_element:INFO: Eye window for uplink 0 : _____________________________________________________XXXXXX_____________________
Clock Delay: 15
08:56:37:setup_element:INFO: Setting the clock phase to 15 for group 0, downlink 0
08:56:37:setup_element:INFO: Scanning data phases
08:56:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:56:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
08:56:42:setup_element:INFO: Data phase scan results for group 0, downlink 0
08:56:42:setup_element:INFO: Eye window for uplink 0 : _____XXXX_______________________________
Data delay found: 26
08:56:42:setup_element:INFO: Setting the data phase to 26 for uplink 0
08:56:42:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 15
Window Length: 74
Eye Windows:
Uplink 0: _____________________________________________________XXXXXX_____________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 26
Window Length: 36
Eye Window: _____XXXX_______________________________
]
08:56:42:setup_element:INFO: Beginning SMX ASICs map scan
08:56:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:56:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
08:56:42:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
08:56:42:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
08:56:42:uplink:INFO: Setting uplinks mask [0]
08:56:44:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0
08:56:45:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map:
ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
Clock Phase Characteristic:
Optimal Phase: 15
Window Length: 74
Eye Windows:
Uplink 0: _____________________________________________________XXXXXX_____________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 26
Window Length: 36
Eye Window: _____XXXX_______________________________
08:56:45:setup_element:INFO: Performing Elink synchronization
08:56:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:56:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
08:56:45:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
08:56:45:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
08:56:45:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
08:56:45:uplink:INFO: Enabling uplinks [0]
08:56:45:ST3_emu:INFO: Number of chips: 1
08:56:45:ST3_emu:INFO: Chip address: 0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
08:56:46:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
============== Starting SMX ID burn ==============
08:56:50:asictest:WARNING: Fused ID is not zero 6359364699117612658
08:56:50:asictest:INFO: Starting ADC calibration/scan
08:56:56:asictest:INFO: 0, 0, 0.000000
08:57:02:asictest:INFO: 1, 40, 0.300000
08:57:07:asictest:INFO: 2, 81, 0.600000
08:57:13:asictest:INFO: 3, 126, 0.900000
08:57:19:asictest:INFO: 4, 174, 1.200000
08:57:25:asictest:INFO: 5, 191, 1.300000
08:57:30:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV]
08:57:31:asictest:INFO: 19.60 1199.89 829.34 0.00
08:57:32:ST3_smx:INFO: chip: 0-7 19.601019 C 1199.891358 mV
08:57:32:ST3_smx:INFO: # loops 0
08:57:33:ST3_smx:INFO: # loops 1
08:57:35:ST3_smx:INFO: # loops 2
08:57:37:ST3_smx:INFO: # loops 3
08:57:38:ST3_smx:INFO: # loops 4
08:57:40:ST3_smx:INFO: Total # of broken channels: 0
08:57:40:ST3_smx:INFO: List of broken channels: []
08:57:40:ST3_smx:INFO: Total # of broken channels: 0
08:57:40:ST3_smx:INFO: List of broken channels: []
08:57:41:asictest:INFO: Starting CSA scan -
08:57:42:asictest:INFO: 0, 0.066200
08:57:43:asictest:INFO: 9, 0.150700
08:57:43:asictest:INFO: 18, 0.228700
08:57:44:asictest:INFO: 27, 0.303100
08:57:44:asictest:INFO: 36, 0.377900
08:57:45:asictest:INFO: 45, 0.446900
08:57:46:asictest:INFO: 54, 0.506900
08:57:46:asictest:INFO: 63, 0.548200
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_09_01-08_56_35
OPERATOR : Olga B.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID : 0000L000-M000 | side-N | index: (2/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
HW_ADDR : 0x7 | VERS_NO : 2.2
ASIC_ID : XA-000-08-002-001-006-231-02 | FUSED_ID : 6359364699117612658
IC_TEMP : 12.77 | VDDM : 1127.54 | AUX_INT : 0.00 | CsaBias : 123.86
CONF_FAIL_REG : 0
CSA_BIAS : 15
THR2_GLB : 30
ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
ADC_Chi2/NDF : 2.89349e-06 / 1
ADC_P0 : 0.00000e+00 ± 1.70103e-03
ADC_P1 : 7.82711e-03 ± 2.90817e-05
ADC_P2 : -5.35162e-06 ± 1.72246e-07
CSA_Chi2/NDF : 1.30766e-04 / 1
CSA_P0 : 6.36667e-02 ± 4.30409e-03
CSA_P1 : 9.97526e-03 ± 3.19156e-04
CSA_P2 : -3.47884e-05 ± 4.87106e-06
---------------------------------------
N_BROKEN_DISC : 0 | N_BROKEN_FAST : []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.198', '0.3642', '1.800', '0.0964', '1.800', '0.1532', '7.000', '0.6848']
VI_after__Init : ['1.200', '0.3631', '1.800', '0.0956', '1.800', '0.1525', '7.000', '0.6858']
VI_at__the_End : ['1.200', '0.5477', '1.800', '0.0721', '1.800', '0.1653', '7.000', '0.6866']
08:58:04:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-001-006-231-02//TestDate_2023_09_01-08_56_35/
Comment
J076, UK module