XA-000-08-002-001-006-233-02 01.09.23 09:24:50
ADC4
SMX_7
CSA
Calibration
ADC
CSA
Info
09:24:50:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:24:50:ST3_Shared:INFO: -------------------------Microcable-------------------------
09:24:50:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:24:52:smx_tester:INFO: Scanning setup
09:24:52:elinks:INFO: Disabling clock on downlink 0
09:24:52:elinks:INFO: Disabling clock on downlink 1
09:24:52:elinks:INFO: Disabling clock on downlink 2
09:24:52:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:24:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:24:52:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
09:24:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:24:52:elinks:INFO: Disabling clock on downlink 0
09:24:52:elinks:INFO: Disabling clock on downlink 1
09:24:52:elinks:INFO: Disabling clock on downlink 2
09:24:52:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:24:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:24:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:24:52:elinks:INFO: Disabling clock on downlink 0
09:24:52:elinks:INFO: Disabling clock on downlink 1
09:24:52:elinks:INFO: Disabling clock on downlink 2
09:24:52:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:24:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:24:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:24:52:setup_element:INFO: Scanning clock phase
09:24:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:24:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:24:52:setup_element:INFO: Clock phase scan results for group 0, downlink 0
09:24:52:setup_element:INFO: Eye window for uplink 0 : _____________________________________________________XXXXX______________________
Clock Delay: 15
09:24:52:setup_element:INFO: Setting the clock phase to 15 for group 0, downlink 0
09:24:52:setup_element:INFO: Scanning data phases
09:24:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:24:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:24:57:setup_element:INFO: Data phase scan results for group 0, downlink 0
09:24:57:setup_element:INFO: Eye window for uplink 0 : ____XXXX________________________________
Data delay found: 25
09:24:57:setup_element:INFO: Setting the data phase to 25 for uplink 0
09:24:57:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 15
Window Length: 75
Eye Windows:
Uplink 0: _____________________________________________________XXXXX______________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 25
Window Length: 36
Eye Window: ____XXXX________________________________
]
09:24:57:setup_element:INFO: Beginning SMX ASICs map scan
09:24:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:24:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:24:57:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
09:24:57:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
09:24:57:uplink:INFO: Setting uplinks mask [0]
09:24:59:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0
09:25:00:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map:
ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
Clock Phase Characteristic:
Optimal Phase: 15
Window Length: 75
Eye Windows:
Uplink 0: _____________________________________________________XXXXX______________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 25
Window Length: 36
Eye Window: ____XXXX________________________________
09:25:00:setup_element:INFO: Performing Elink synchronization
09:25:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:25:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:25:00:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
09:25:00:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
09:25:00:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
09:25:00:uplink:INFO: Enabling uplinks [0]
09:25:00:ST3_emu:INFO: Number of chips: 1
09:25:00:ST3_emu:INFO: Chip address: 0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
09:25:01:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
============== Starting SMX ID burn ==============
09:25:04:asictest:WARNING: Fused ID is not zero 6359364699117612690
09:25:05:asictest:INFO: Starting ADC calibration/scan
09:25:11:asictest:INFO: 0, 0, 0.000000
09:25:16:asictest:INFO: 1, 41, 0.300000
09:25:22:asictest:INFO: 2, 81, 0.600000
09:25:28:asictest:INFO: 3, 127, 0.900000
09:25:34:asictest:INFO: 4, 175, 1.200000
09:25:40:asictest:INFO: 5, 191, 1.300000
09:25:45:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV]
09:25:45:asictest:INFO: 21.35 1202.58 812.39 0.00
09:25:47:ST3_smx:INFO: chip: 0-7 21.348625 C 1202.579735 mV
09:25:47:ST3_smx:INFO: # loops 0
09:25:48:ST3_smx:INFO: # loops 1
09:25:50:ST3_smx:INFO: # loops 2
09:25:51:ST3_smx:INFO: # loops 3
09:25:53:ST3_smx:INFO: # loops 4
09:25:54:ST3_smx:INFO: Total # of broken channels: 0
09:25:54:ST3_smx:INFO: List of broken channels: []
09:25:54:ST3_smx:INFO: Total # of broken channels: 0
09:25:54:ST3_smx:INFO: List of broken channels: []
09:25:55:asictest:INFO: Starting CSA scan -
09:25:56:asictest:INFO: 0, 0.065500
09:25:57:asictest:INFO: 9, 0.151000
09:25:58:asictest:INFO: 18, 0.228700
09:25:58:asictest:INFO: 27, 0.302600
09:25:59:asictest:INFO: 36, 0.375900
09:26:00:asictest:INFO: 45, 0.443400
09:26:00:asictest:INFO: 54, 0.503300
09:26:01:asictest:INFO: 63, 0.547300
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_09_01-09_24_50
OPERATOR : Olga B.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID : 0000L000-M000 | side-P | index: (4/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
HW_ADDR : 0x7 | VERS_NO : 2.2
ASIC_ID : XA-000-08-002-001-006-233-02 | FUSED_ID : 6359364699117612690
IC_TEMP : 14.53 | VDDM : 1124.03 | AUX_INT : 0.00 | CsaBias : 115.36
CONF_FAIL_REG : 0
CSA_BIAS : 15
THR2_GLB : 30
ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
ADC_Chi2/NDF : 5.12042e-05 / 1
ADC_P0 : 0.00000e+00 ± 7.15571e-03
ADC_P1 : 7.76773e-03 ± 1.22824e-04
ADC_P2 : -5.11909e-06 ± 7.25742e-07
CSA_Chi2/NDF : 7.37539e-05 / 1
CSA_P0 : 6.40292e-02 ± 3.23241e-03
CSA_P1 : 9.89239e-03 ± 2.39689e-04
CSA_P2 : -3.41637e-05 ± 3.65820e-06
---------------------------------------
N_BROKEN_DISC : 0 | N_BROKEN_FAST : []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.2057', '1.800', '0.1017', '1.800', '0.1440', '7.000', '0.6887']
VI_after__Init : ['1.200', '0.2068', '1.800', '0.1016', '1.800', '0.1439', '7.000', '0.6898']
VI_at__the_End : ['1.200', '0.5444', '1.800', '0.0742', '1.800', '0.1685', '7.000', '0.6897']
09:26:26:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-001-006-233-02//TestDate_2023_09_01-09_24_50/
Comment
J076, UK module