XA-000-08-002-001-006-239-02    01.09.23 09:27:00

ADC4
cADCscan.png
SMX_7
SMX_7.png
CSA
cCSAscan.png
Calibration
ADC
p0.svg
p1.svg
CSA
p0.svg
p2.svg
p1.svg
Report.txt
            09:27:00:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:27:00:ST3_Shared:INFO:	-------------------------Microcable-------------------------
09:27:00:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:27:02:smx_tester:INFO:	Scanning setup
09:27:02:elinks:INFO:	Disabling clock on downlink 0
09:27:02:elinks:INFO:	Disabling clock on downlink 1
09:27:02:elinks:INFO:	Disabling clock on downlink 2
09:27:02:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:27:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:27:02:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 0
09:27:02:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:27:02:elinks:INFO:	Disabling clock on downlink 0
09:27:02:elinks:INFO:	Disabling clock on downlink 1
09:27:02:elinks:INFO:	Disabling clock on downlink 2
09:27:02:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:27:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:27:02:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:27:02:elinks:INFO:	Disabling clock on downlink 0
09:27:02:elinks:INFO:	Disabling clock on downlink 1
09:27:02:elinks:INFO:	Disabling clock on downlink 2
09:27:02:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:27:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:27:03:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:27:03:setup_element:INFO:	Scanning clock phase
09:27:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:27:03:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:27:03:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
09:27:03:setup_element:INFO:	Eye window for uplink 0 : _____________________________________________________XXXXXX_____________________
Clock Delay: 15
09:27:03:setup_element:INFO:	Setting the clock phase to 15 for group 0, downlink 0
09:27:03:setup_element:INFO:	Scanning data phases
09:27:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:27:03:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:27:08:setup_element:INFO:	Data phase scan results for group 0, downlink 0
09:27:08:setup_element:INFO:	Eye window for uplink 0 : _____XXXX_______________________________
Data delay found: 26
09:27:08:setup_element:INFO:	Setting the data phase to 26 for uplink 0
09:27:08:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 15
    Window Length: 74
    Eye Windows:
      Uplink  0: _____________________________________________________XXXXXX_____________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 26
      Window Length: 36
      Eye Window: _____XXXX_______________________________
]
09:27:08:setup_element:INFO:	Beginning SMX ASICs map scan
09:27:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:27:08:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:27:08:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
09:27:08:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
09:27:08:uplink:INFO:	Setting uplinks mask [0]
09:27:09:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 0
09:27:10:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map:
    ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
  Clock Phase Characteristic:
    Optimal Phase: 15
    Window Length: 74
    Eye Windows:
      Uplink  0: _____________________________________________________XXXXXX_____________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 26
      Window Length: 36
      Eye Window: _____XXXX_______________________________

09:27:10:setup_element:INFO:	Performing Elink synchronization
09:27:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:27:10:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:27:10:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
09:27:11:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
09:27:11:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
09:27:11:uplink:INFO:	Enabling uplinks [0]
09:27:11:ST3_emu:INFO:	Number of chips: 1
09:27:11:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
09:27:12:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
 ============== Starting SMX ID burn ==============
09:27:15:asictest:WARNING:	Fused ID is not zero 6359364699117612786
09:27:16:asictest:INFO:	 Starting ADC calibration/scan 
09:27:21:asictest:INFO:	0,	0,	0.000000
09:27:27:asictest:INFO:	1,	38,	0.300000
09:27:33:asictest:INFO:	2,	75,	0.600000
09:27:39:asictest:INFO:	3,	119,	0.900000
09:27:44:asictest:INFO:	4,	164,	1.200000
09:27:50:asictest:INFO:	5,	180,	1.300000
09:27:55:asictest:INFO:	T [C] Vddm[mV] CSA [mV] AUX [mV]
09:27:56:asictest:INFO:	  5.69 1199.43  795.44    0.00
09:27:57:ST3_smx:INFO:	chip: 0-7 	 5.694619 C 	 1199.434136 mV
09:27:57:ST3_smx:INFO:	# loops 0
09:27:59:ST3_smx:INFO:	# loops 1
09:28:00:ST3_smx:INFO:	# loops 2
09:28:02:ST3_smx:INFO:	# loops 3
09:28:04:ST3_smx:INFO:	# loops 4
09:28:05:ST3_smx:INFO:	Total # of broken channels: 0
09:28:05:ST3_smx:INFO:	List of broken channels: []
09:28:05:ST3_smx:INFO:	Total # of broken channels: 0
09:28:05:ST3_smx:INFO:	List of broken channels: []
09:28:06:asictest:INFO:	 Starting CSA scan -
09:28:07:asictest:INFO:	0,	0.063900
09:28:08:asictest:INFO:	9,	0.141000
09:28:08:asictest:INFO:	18,	0.213000
09:28:09:asictest:INFO:	27,	0.283300
09:28:10:asictest:INFO:	36,	0.347900
09:28:10:asictest:INFO:	45,	0.406600
09:28:11:asictest:INFO:	54,	0.454200
09:28:12:asictest:INFO:	63,	0.482800
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_09_01-09_27_00
OPERATOR  : Olga B.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 0000L000-M000 | side-P | index: (5/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
  HW_ADDR : 0x7 | VERS_NO : 2.2
  ASIC_ID : XA-000-08-002-001-006-239-02 | FUSED_ID : 6359364699117612786
  IC_TEMP :  -15.84 | VDDM : 1121.85 | AUX_INT :    0.00 | CsaBias :  106.03
  CONF_FAIL_REG : 0
  CSA_BIAS : 15
  THR2_GLB : 30
  ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
  ADC_Chi2/NDF : 5.06697e-07 / 0
  ADC_P0  : 0.00000e+00 ± 1.00000e+00
  ADC_P1  : 8.22882e-03 ± 2.70289e-02
  ADC_P2  : -5.58047e-06 ± 1.64894e-04
  CSA_Chi2/NDF : 1.39847e-04 / 0
  CSA_P0  : 6.00708e-02 ± 4.45103e-03
  CSA_P1  : 9.54782e-03 ± 3.30052e-04
  CSA_P2  : -4.35553e-05 ± 5.03735e-06
---------------------------------------
N_BROKEN_DISC :  0 | N_BROKEN_FAST :  []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.4617', '1.800', '0.1020', '1.800', '0.1496', '7.000', '0.6888']
VI_after__Init : ['1.200', '0.4634', '1.800', '0.0995', '1.800', '0.1503', '7.000', '0.6898']
VI_at__the_End : ['1.200', '0.4825', '1.800', '0.0676', '1.800', '0.1672', '7.000', '0.6898']
09:28:29:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-001-006-239-02//TestDate_2023_09_01-09_27_00/

          
Comment.txt
J076, UK module