XA-000-08-002-001-006-248-05    11.09.23 13:50:33

ADC4
cADCscan.png
SMX_7
SMX_7.png
CSA
cCSAscan.png
Calibration
ADC
p0.svg
p1.svg
CSA
p0.svg
p2.svg
p1.svg
Report.txt
            13:50:33:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:50:33:ST3_Shared:INFO:	-------------------------Microcable-------------------------
13:50:33:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:50:35:smx_tester:INFO:	Scanning setup
13:50:35:elinks:INFO:	Disabling clock on downlink 0
13:50:35:elinks:INFO:	Disabling clock on downlink 1
13:50:35:elinks:INFO:	Disabling clock on downlink 2
13:50:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:50:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:50:35:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 0
13:50:35:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 3
13:50:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:50:35:elinks:INFO:	Disabling clock on downlink 0
13:50:35:elinks:INFO:	Disabling clock on downlink 1
13:50:35:elinks:INFO:	Disabling clock on downlink 2
13:50:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:50:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:50:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:50:35:elinks:INFO:	Disabling clock on downlink 0
13:50:35:elinks:INFO:	Disabling clock on downlink 1
13:50:35:elinks:INFO:	Disabling clock on downlink 2
13:50:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:50:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:50:36:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:50:36:setup_element:INFO:	Scanning clock phase
13:50:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:50:36:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:50:36:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
13:50:36:setup_element:INFO:	Eye window for uplink 0 : _____________________________________________________XXXXXXX____________________
Clock Delay: 16
13:50:36:setup_element:INFO:	Eye window for uplink 3 : ________________________________________________________________________________
Clock Delay: 40
13:50:36:setup_element:INFO:	Setting the clock phase to 16 for group 0, downlink 0
13:50:36:setup_element:INFO:	Scanning data phases
13:50:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:50:36:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:50:41:setup_element:INFO:	Data phase scan results for group 0, downlink 0
13:50:41:setup_element:INFO:	Eye window for uplink 0 : ____XXXX________________________________
Data delay found: 25
13:50:41:setup_element:WARNING:	Group 0, downlink 0, uplink 3: No True values in scanned data!
Traceback (most recent call last):
  File "/home/cbm/ST3_BASE/smx_software_ASIC_20MHz/python/hctsp/setup_element.py", line 261, in characterize_data_phases
    data_delay, window_len = find_center(fcl)
  File "/home/cbm/ST3_BASE/smx_software_ASIC_20MHz/python/hctsp/hctsp.py", line 87, in find_center
    raise Exception("No True values in scanned data!")
Exception: No True values in scanned data!

13:50:41:setup_element:INFO:	Setting the data phase to 25 for uplink 0
13:50:41:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0, 3]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 16
    Window Length: 73
    Eye Windows:
      Uplink  0: _____________________________________________________XXXXXXX____________________
      Uplink  3: ________________________________________________________________________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 25
      Window Length: 36
      Eye Window: ____XXXX________________________________
]
13:50:41:setup_element:INFO:	Beginning SMX ASICs map scan
13:50:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:50:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:50:41:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
13:50:41:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
13:50:41:uplink:INFO:	Setting uplinks mask [0, 3]
13:50:42:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 0
13:50:44:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0, 3]
  ASICs Map:
    ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
  Clock Phase Characteristic:
    Optimal Phase: 16
    Window Length: 73
    Eye Windows:
      Uplink  0: _____________________________________________________XXXXXXX____________________
      Uplink  3: ________________________________________________________________________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 25
      Window Length: 36
      Eye Window: ____XXXX________________________________

13:50:44:setup_element:INFO:	Performing Elink synchronization
13:50:44:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:50:44:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:50:44:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
13:50:44:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
13:50:44:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
13:50:44:uplink:INFO:	Enabling uplinks [0, 3]
13:50:44:ST3_emu:INFO:	Number of chips: 1
13:50:44:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
13:50:45:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
 ============== Starting SMX ID burn ==============
13:50:48:asictest:WARNING:	Fused ID is not zero 6359364699117612933
13:50:49:asictest:INFO:	 Starting ADC calibration/scan 
13:50:54:asictest:INFO:	0,	0,	0.000000
13:51:00:asictest:INFO:	1,	41,	0.300000
13:51:06:asictest:INFO:	2,	82,	0.600000
13:51:12:asictest:INFO:	3,	130,	0.900000
13:51:17:asictest:INFO:	4,	180,	1.200000
13:51:23:asictest:INFO:	5,	198,	1.300000
13:51:29:asictest:INFO:	T [C] Vddm[mV] CSA [mV] AUX [mV]
13:51:29:asictest:INFO:	 12.84 1194.33  811.45    0.00
13:51:31:ST3_smx:INFO:	chip: 0-7 	 12.838766 C 	 1199.922473 mV
13:51:31:ST3_smx:INFO:	# loops 0
13:51:32:ST3_smx:INFO:	# loops 1
13:51:34:ST3_smx:INFO:	# loops 2
13:51:35:ST3_smx:INFO:	# loops 3
13:51:37:ST3_smx:INFO:	# loops 4
13:51:38:ST3_smx:INFO:	Total # of broken channels: 0
13:51:38:ST3_smx:INFO:	List of broken channels: []
13:51:38:ST3_smx:INFO:	Total # of broken channels: 0
13:51:38:ST3_smx:INFO:	List of broken channels: []
13:51:39:asictest:INFO:	 Starting CSA scan -
13:51:40:asictest:INFO:	0,	0.063400
13:51:41:asictest:INFO:	9,	0.144000
13:51:41:asictest:INFO:	18,	0.218600
13:51:42:asictest:INFO:	27,	0.292200
13:51:43:asictest:INFO:	36,	0.362400
13:51:44:asictest:INFO:	45,	0.426800
13:51:44:asictest:INFO:	54,	0.482900
13:51:45:asictest:INFO:	63,	0.520700
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_09_11-13_50_33
OPERATOR  : Olga B.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 0115L019-M000 | side-N | index: (1/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
  HW_ADDR : 0x7 | VERS_NO : 2.2
  ASIC_ID : XA-000-08-002-001-006-248-05 | FUSED_ID : 6359364699117612933
  IC_TEMP :    9.54 | VDDM : 1097.42 | AUX_INT :    0.00 | CsaBias :   99.68
  CONF_FAIL_REG : 0
  CSA_BIAS : 15
  THR2_GLB : 30
  ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
  ADC_Chi2/NDF : 6.01935e-05 / 1
  ADC_P0  : 0.00000e+00 ± 7.75845e-03
  ADC_P1  : 7.74579e-03 ± 1.27842e-04
  ADC_P2  : -5.99750e-06 ± 7.30379e-07
  CSA_Chi2/NDF : 1.17676e-04 / 1
  CSA_P0  : 6.03750e-02 ± 4.08298e-03
  CSA_P1  : 9.67989e-03 ± 3.02761e-04
  CSA_P2  : -3.62728e-05 ± 4.62082e-06
---------------------------------------
N_BROKEN_DISC :  0 | N_BROKEN_FAST :  []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.1130', '1.800', '0.0740', '1.800', '0.1362', '7.000', '0.6913']
VI_after__Init : ['1.200', '0.1133', '1.800', '0.0741', '1.800', '0.1348', '7.000', '0.6909']
VI_at__the_End : ['1.200', '0.5220', '1.800', '0.0724', '1.800', '0.1543', '7.000', '0.6908']
13:53:15:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-001-006-248-05//TestDate_2023_09_11-13_50_33/