XA-000-08-002-001-007-022-09    11.09.23 12:56:14

ADC4
cADCscan.png
SMX_7
SMX_7.png
CSA
cCSAscan.png
Calibration
ADC
p0.svg
p1.svg
CSA
p0.svg
p2.svg
p1.svg
Report.txt
            12:56:14:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:56:14:ST3_Shared:INFO:	-------------------------Microcable-------------------------
12:56:14:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:56:16:smx_tester:INFO:	Scanning setup
12:56:16:elinks:INFO:	Disabling clock on downlink 0
12:56:16:elinks:INFO:	Disabling clock on downlink 1
12:56:16:elinks:INFO:	Disabling clock on downlink 2
12:56:16:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:56:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:56:16:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 0
12:56:16:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 3
12:56:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:56:16:elinks:INFO:	Disabling clock on downlink 0
12:56:16:elinks:INFO:	Disabling clock on downlink 1
12:56:16:elinks:INFO:	Disabling clock on downlink 2
12:56:16:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:56:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:56:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:56:16:elinks:INFO:	Disabling clock on downlink 0
12:56:16:elinks:INFO:	Disabling clock on downlink 1
12:56:16:elinks:INFO:	Disabling clock on downlink 2
12:56:16:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:56:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:56:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:56:16:setup_element:INFO:	Scanning clock phase
12:56:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:56:16:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:56:17:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
12:56:17:setup_element:INFO:	Eye window for uplink 0 : _____________________________________________________XXXXXX_____________________
Clock Delay: 15
12:56:17:setup_element:INFO:	Eye window for uplink 3 : ________________________________________________________________________________
Clock Delay: 40
12:56:17:setup_element:INFO:	Setting the clock phase to 15 for group 0, downlink 0
12:56:17:setup_element:INFO:	Scanning data phases
12:56:17:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:56:17:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:56:22:setup_element:INFO:	Data phase scan results for group 0, downlink 0
12:56:22:setup_element:INFO:	Eye window for uplink 0 : ____XXXXX_______________________________
Data delay found: 26
12:56:22:setup_element:WARNING:	Group 0, downlink 0, uplink 3: No True values in scanned data!
Traceback (most recent call last):
  File "/home/cbm/ST3_BASE/smx_software_ASIC_20MHz/python/hctsp/setup_element.py", line 261, in characterize_data_phases
    data_delay, window_len = find_center(fcl)
  File "/home/cbm/ST3_BASE/smx_software_ASIC_20MHz/python/hctsp/hctsp.py", line 87, in find_center
    raise Exception("No True values in scanned data!")
Exception: No True values in scanned data!

12:56:22:setup_element:INFO:	Setting the data phase to 26 for uplink 0
12:56:22:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0, 3]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 15
    Window Length: 74
    Eye Windows:
      Uplink  0: _____________________________________________________XXXXXX_____________________
      Uplink  3: ________________________________________________________________________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
]
12:56:22:setup_element:INFO:	Beginning SMX ASICs map scan
12:56:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:56:22:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:56:22:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
12:56:22:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
12:56:22:uplink:INFO:	Setting uplinks mask [0, 3]
12:56:23:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 0
12:56:24:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0, 3]
  ASICs Map:
    ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
  Clock Phase Characteristic:
    Optimal Phase: 15
    Window Length: 74
    Eye Windows:
      Uplink  0: _____________________________________________________XXXXXX_____________________
      Uplink  3: ________________________________________________________________________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________

12:56:24:setup_element:INFO:	Performing Elink synchronization
12:56:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:56:24:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:56:24:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
12:56:24:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
12:56:24:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
12:56:24:uplink:INFO:	Enabling uplinks [0, 3]
12:56:24:ST3_emu:INFO:	Number of chips: 1
12:56:24:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
12:56:25:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
 ============== Starting SMX ID burn ==============
12:56:29:asictest:WARNING:	Fused ID is not zero 6359364699117613417
12:56:29:asictest:INFO:	 Starting ADC calibration/scan 
12:56:35:asictest:INFO:	0,	0,	0.000000
12:56:41:asictest:INFO:	1,	42,	0.300000
12:56:47:asictest:INFO:	2,	83,	0.600000
12:56:52:asictest:INFO:	3,	129,	0.900000
12:56:58:asictest:INFO:	4,	176,	1.200000
12:57:04:asictest:INFO:	5,	193,	1.300000
12:57:09:asictest:INFO:	T [C] Vddm[mV] CSA [mV] AUX [mV]
12:57:10:asictest:INFO:	 27.68 1198.28  831.96    7.54
12:57:11:ST3_smx:INFO:	chip: 0-7 	 27.684779 C 	 1198.277309 mV
12:57:11:ST3_smx:INFO:	# loops 0
12:57:13:ST3_smx:INFO:	# loops 1
12:57:14:ST3_smx:INFO:	# loops 2
12:57:16:ST3_smx:INFO:	# loops 3
12:57:18:ST3_smx:INFO:	# loops 4
12:57:20:ST3_smx:INFO:	Total # of broken channels: 0
12:57:20:ST3_smx:INFO:	List of broken channels: []
12:57:20:ST3_smx:INFO:	Total # of broken channels: 0
12:57:20:ST3_smx:INFO:	List of broken channels: []
12:57:21:asictest:INFO:	 Starting CSA scan -
12:57:21:asictest:INFO:	0,	0.065500
12:57:22:asictest:INFO:	9,	0.149900
12:57:23:asictest:INFO:	18,	0.227000
12:57:23:asictest:INFO:	27,	0.299300
12:57:24:asictest:INFO:	36,	0.371100
12:57:25:asictest:INFO:	45,	0.443900
12:57:25:asictest:INFO:	54,	0.506700
12:57:26:asictest:INFO:	63,	0.554000
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_09_11-12_56_14
OPERATOR  : Oleksandr S.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 0123L019-M001 | side-N | index: (1/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
  HW_ADDR : 0x7 | VERS_NO : 2.2
  ASIC_ID : XA-000-08-002-001-007-022-09 | FUSED_ID : 6359364699117613417
  IC_TEMP :   17.54 | VDDM : 1137.12 | AUX_INT :    0.00 | CsaBias :  141.81
  CONF_FAIL_REG : 0
  CSA_BIAS : 15
  THR2_GLB : 30
  ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
  ADC_Chi2/NDF : 2.31647e-05 / 1
  ADC_P0  : 0.00000e+00 ± 4.81297e-03
  ADC_P1  : 7.54305e-03 ± 8.19949e-05
  ADC_P2  : -4.17420e-06 ± 4.80545e-07
  CSA_Chi2/NDF : 9.06760e-05 / 1
  CSA_P0  : 6.47750e-02 ± 3.58410e-03
  CSA_P1  : 9.55899e-03 ± 2.65767e-04
  CSA_P2  : -2.73075e-05 ± 4.05622e-06
---------------------------------------
N_BROKEN_DISC :  0 | N_BROKEN_FAST :  []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.198', '0.2921', '1.801', '0.1054', '1.800', '0.1410', '6.999', '0.6878']
VI_after__Init : ['1.199', '0.2913', '1.800', '0.1050', '1.800', '0.1407', '7.000', '0.6892']
VI_at__the_End : ['1.200', '0.5535', '1.800', '0.0744', '1.800', '0.1685', '7.000', '0.6891']
12:57:31:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-001-007-022-09//TestDate_2023_09_11-12_56_14/