XA-000-08-002-001-007-096-05    17.10.23 15:59:18

ADC4
cADCscan.png
SMX_7
SMX_7.png
CSA
cCSAscan.png
Calibration
ADC
p0.svg
p1.svg
CSA
p0.svg
p2.svg
p1.svg
Report.txt
            15:59:18:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:59:18:ST3_Shared:INFO:	-------------------------Microcable-------------------------
15:59:18:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:59:20:smx_tester:INFO:	Scanning setup
15:59:20:elinks:INFO:	Disabling clock on downlink 0
15:59:20:elinks:INFO:	Disabling clock on downlink 1
15:59:20:elinks:INFO:	Disabling clock on downlink 2
15:59:20:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:59:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
15:59:20:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 0
15:59:20:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:59:20:elinks:INFO:	Disabling clock on downlink 0
15:59:20:elinks:INFO:	Disabling clock on downlink 1
15:59:20:elinks:INFO:	Disabling clock on downlink 2
15:59:20:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:59:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
15:59:20:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:59:20:elinks:INFO:	Disabling clock on downlink 0
15:59:20:elinks:INFO:	Disabling clock on downlink 1
15:59:20:elinks:INFO:	Disabling clock on downlink 2
15:59:20:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:59:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:59:20:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:59:20:setup_element:INFO:	Scanning clock phase
15:59:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
15:59:20:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
15:59:20:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
15:59:20:setup_element:INFO:	Eye window for uplink 0 : _____________________________________________________XXXXX______________________
Clock Delay: 15
15:59:20:setup_element:INFO:	Setting the clock phase to 15 for group 0, downlink 0
15:59:20:setup_element:INFO:	Scanning data phases
15:59:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
15:59:20:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
15:59:25:setup_element:INFO:	Data phase scan results for group 0, downlink 0
15:59:25:setup_element:INFO:	Eye window for uplink 0 : _____XXX________________________________
Data delay found: 26
15:59:25:setup_element:INFO:	Setting the data phase to 26 for uplink 0
15:59:25:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 15
    Window Length: 75
    Eye Windows:
      Uplink  0: _____________________________________________________XXXXX______________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 26
      Window Length: 37
      Eye Window: _____XXX________________________________
]
15:59:25:setup_element:INFO:	Beginning SMX ASICs map scan
15:59:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
15:59:25:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
15:59:25:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
15:59:25:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
15:59:25:uplink:INFO:	Setting uplinks mask [0]
15:59:27:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 0
15:59:28:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map:
    ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
  Clock Phase Characteristic:
    Optimal Phase: 15
    Window Length: 75
    Eye Windows:
      Uplink  0: _____________________________________________________XXXXX______________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 26
      Window Length: 37
      Eye Window: _____XXX________________________________

15:59:28:setup_element:INFO:	Performing Elink synchronization
15:59:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
15:59:28:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
15:59:28:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
15:59:28:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
15:59:28:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
15:59:28:uplink:INFO:	Enabling uplinks [0]
15:59:28:ST3_emu:INFO:	Number of chips: 1
15:59:28:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
15:59:29:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
 ============== Starting SMX ID burn ==============
15:59:33:asictest:WARNING:	Fused ID is not zero 6359364699117614597
15:59:33:asictest:INFO:	 Starting ADC calibration/scan 
15:59:39:asictest:INFO:	0,	0,	0.000000
15:59:45:asictest:INFO:	1,	42,	0.300000
15:59:50:asictest:INFO:	2,	85,	0.600000
15:59:56:asictest:INFO:	3,	134,	0.900000
16:00:02:asictest:INFO:	4,	183,	1.200000
16:00:08:asictest:INFO:	5,	200,	1.300000
16:00:13:asictest:INFO:	T [C] Vddm[mV] CSA [mV] AUX [mV]
16:00:14:asictest:INFO:	 20.96 1200.55  882.35    0.00
16:00:15:ST3_smx:INFO:	chip: 0-7 	 20.960116 C 	 1206.320785 mV
16:00:15:ST3_smx:INFO:	# loops 0
16:00:17:ST3_smx:INFO:	# loops 1
16:00:18:ST3_smx:INFO:	# loops 2
16:00:20:ST3_smx:INFO:	# loops 3
16:00:22:ST3_smx:INFO:	# loops 4
16:00:23:ST3_smx:INFO:	Total # of broken channels: 0
16:00:23:ST3_smx:INFO:	List of broken channels: []
16:00:23:ST3_smx:INFO:	Total # of broken channels: 0
16:00:23:ST3_smx:INFO:	List of broken channels: []
16:00:24:asictest:INFO:	 Starting CSA scan -
16:00:25:asictest:INFO:	0,	0.063100
16:00:26:asictest:INFO:	9,	0.141700
16:00:26:asictest:INFO:	18,	0.214700
16:00:27:asictest:INFO:	27,	0.283500
16:00:28:asictest:INFO:	36,	0.349600
16:00:28:asictest:INFO:	45,	0.418000
16:00:29:asictest:INFO:	54,	0.483200
16:00:30:asictest:INFO:	63,	0.532200
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_10_17-15_59_18
OPERATOR  : Robert V.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 0311L020-M002 | side-P | index: (4/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
  HW_ADDR : 0x7 | VERS_NO : 2.2
  ASIC_ID : XA-000-08-002-001-007-096-05 | FUSED_ID : 6359364699117614597
  IC_TEMP :   14.46 | VDDM : 1130.61 | AUX_INT :    0.00 | CsaBias :  145.17
  CONF_FAIL_REG : 0
  CSA_BIAS : 15
  THR2_GLB : 30
  ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
  ADC_Chi2/NDF : 1.03272e-04 / 1
  ADC_P0  : 0.00000e+00 ± 1.01623e-02
  ADC_P1  : 7.34405e-03 ± 1.67351e-04
  ADC_P2  : -4.28237e-06 ± 9.44737e-07
  CSA_Chi2/NDF : 5.49467e-05 / 1
  CSA_P0  : 6.33000e-02 ± 2.79000e-03
  CSA_P1  : 8.75370e-03 ± 2.06884e-04
  CSA_P2  : -1.99588e-05 ± 3.15752e-06
---------------------------------------
N_BROKEN_DISC :  0 | N_BROKEN_FAST :  []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.2932', '1.800', '0.1196', '1.801', '0.1444', '7.000', '0.6884']
VI_after__Init : ['1.200', '0.2933', '1.800', '0.1188', '1.800', '0.1416', '7.000', '0.6888']
VI_at__the_End : ['1.200', '0.5317', '1.800', '0.0716', '1.800', '0.1652', '7.000', '0.6889']
16:00:51:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-001-007-096-05//TestDate_2023_10_17-15_59_18/