XA-000-08-002-001-007-101-05    17.10.23 15:52:39

ADC4
cADCscan.png
SMX_7
SMX_7.png
CSA
cCSAscan.png
Calibration
ADC
p0.svg
p1.svg
CSA
p0.svg
p2.svg
p1.svg
Report.txt
            15:52:39:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:52:39:ST3_Shared:INFO:	-------------------------Microcable-------------------------
15:52:39:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:52:41:smx_tester:INFO:	Scanning setup
15:52:41:elinks:INFO:	Disabling clock on downlink 0
15:52:41:elinks:INFO:	Disabling clock on downlink 1
15:52:41:elinks:INFO:	Disabling clock on downlink 2
15:52:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:52:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
15:52:41:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 0
15:52:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:52:41:elinks:INFO:	Disabling clock on downlink 0
15:52:41:elinks:INFO:	Disabling clock on downlink 1
15:52:41:elinks:INFO:	Disabling clock on downlink 2
15:52:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:52:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
15:52:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:52:41:elinks:INFO:	Disabling clock on downlink 0
15:52:41:elinks:INFO:	Disabling clock on downlink 1
15:52:41:elinks:INFO:	Disabling clock on downlink 2
15:52:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:52:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:52:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:52:41:setup_element:INFO:	Scanning clock phase
15:52:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
15:52:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
15:52:41:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
15:52:41:setup_element:INFO:	Eye window for uplink 0 : ___________________________________________________XXX__________________________
Clock Delay: 12
15:52:41:setup_element:INFO:	Setting the clock phase to 12 for group 0, downlink 0
15:52:41:setup_element:INFO:	Scanning data phases
15:52:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
15:52:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
15:52:46:setup_element:INFO:	Data phase scan results for group 0, downlink 0
15:52:46:setup_element:INFO:	Eye window for uplink 0 : XXXXX__________________________________X
Data delay found: 21
15:52:46:setup_element:INFO:	Setting the data phase to 21 for uplink 0
15:52:46:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 12
    Window Length: 77
    Eye Windows:
      Uplink  0: ___________________________________________________XXX__________________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
]
15:52:46:setup_element:INFO:	Beginning SMX ASICs map scan
15:52:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
15:52:46:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
15:52:46:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
15:52:46:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
15:52:46:uplink:INFO:	Setting uplinks mask [0]
15:52:47:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 0
15:52:49:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map:
    ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
  Clock Phase Characteristic:
    Optimal Phase: 12
    Window Length: 77
    Eye Windows:
      Uplink  0: ___________________________________________________XXX__________________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X

15:52:49:setup_element:INFO:	Performing Elink synchronization
15:52:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
15:52:49:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
15:52:49:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
15:52:49:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
15:52:49:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
15:52:49:uplink:INFO:	Enabling uplinks [0]
15:52:49:ST3_emu:INFO:	Number of chips: 1
15:52:49:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
15:52:50:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
 ============== Starting SMX ID burn ==============
15:52:53:asictest:WARNING:	Fused ID is not zero 6359364699117614677
15:52:54:asictest:INFO:	 Starting ADC calibration/scan 
15:52:59:asictest:INFO:	0,	0,	0.000000
15:53:05:asictest:INFO:	1,	45,	0.300000
15:53:11:asictest:INFO:	2,	90,	0.600000
15:53:17:asictest:INFO:	3,	141,	0.900000
15:53:22:asictest:INFO:	4,	194,	1.200000
15:53:28:asictest:INFO:	5,	213,	1.300000
15:53:34:asictest:INFO:	T [C] Vddm[mV] CSA [mV] AUX [mV]
15:53:34:asictest:INFO:	 15.39 1194.02  821.76    0.00
15:53:35:ST3_smx:INFO:	chip: 0-7 	 15.386744 C 	 1194.019120 mV
15:53:35:ST3_smx:INFO:	# loops 0
15:53:37:ST3_smx:INFO:	# loops 1
15:53:39:ST3_smx:INFO:	# loops 2
15:53:40:ST3_smx:INFO:	# loops 3
15:53:42:ST3_smx:INFO:	# loops 4
15:53:44:ST3_smx:INFO:	Total # of broken channels: 0
15:53:44:ST3_smx:INFO:	List of broken channels: []
15:53:44:ST3_smx:INFO:	Total # of broken channels: 0
15:53:44:ST3_smx:INFO:	List of broken channels: []
15:53:45:asictest:INFO:	 Starting CSA scan -
15:53:46:asictest:INFO:	0,	0.063200
15:53:46:asictest:INFO:	9,	0.147300
15:53:47:asictest:INFO:	18,	0.223000
15:53:47:asictest:INFO:	27,	0.296400
15:53:48:asictest:INFO:	36,	0.365600
15:53:49:asictest:INFO:	45,	0.430300
15:53:50:asictest:INFO:	54,	0.487000
15:53:50:asictest:INFO:	63,	0.527700
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_10_17-15_52_39
OPERATOR  : Robert V.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 0311L020-M002 | side-P | index: (2/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
  HW_ADDR : 0x7 | VERS_NO : 2.2
  ASIC_ID : XA-000-08-002-001-007-101-05 | FUSED_ID : 6359364699117614677
  IC_TEMP :    9.27 | VDDM : 1096.21 | AUX_INT :    0.00 | CsaBias :  111.17
  CONF_FAIL_REG : 0
  CSA_BIAS : 15
  THR2_GLB : 30
  ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
  ADC_Chi2/NDF : 2.66492e-05 / 1
  ADC_P0  : 0.00000e+00 ± 5.16229e-03
  ADC_P1  : 7.01687e-03 ± 7.93204e-05
  ADC_P2  : -4.30178e-06 ± 4.21220e-07
  CSA_Chi2/NDF : 6.30458e-05 / 1
  CSA_P0  : 6.17125e-02 ± 2.98856e-03
  CSA_P1  : 9.77335e-03 ± 2.21607e-04
  CSA_P2  : -3.66917e-05 ± 3.38223e-06
---------------------------------------
N_BROKEN_DISC :  0 | N_BROKEN_FAST :  []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.4049', '1.800', '0.1249', '1.801', '0.1481', '6.999', '0.6864']
VI_after__Init : ['1.200', '0.4047', '1.800', '0.1243', '1.800', '0.1500', '7.000', '0.6873']
VI_at__the_End : ['1.200', '0.5299', '1.800', '0.0724', '1.800', '0.1641', '7.000', '0.6877']
15:53:56:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-001-007-101-05//TestDate_2023_10_17-15_52_39/
15:55:08:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-001-007-101-05//TestDate_2023_10_17-15_52_39/