XA-000-08-002-001-007-120-02    17.10.23 16:30:14

ADC4
cADCscan.png
SMX_7
SMX_7.png
CSA
cCSAscan.png
Calibration
ADC
p0.svg
p1.svg
CSA
p0.svg
p2.svg
p1.svg
Report.txt
            16:30:14:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
16:30:14:ST3_Shared:INFO:	-------------------------Microcable-------------------------
16:30:14:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
16:30:15:smx_tester:INFO:	Scanning setup
16:30:15:elinks:INFO:	Disabling clock on downlink 0
16:30:15:elinks:INFO:	Disabling clock on downlink 1
16:30:15:elinks:INFO:	Disabling clock on downlink 2
16:30:15:setup_element:INFO:	Checking SOS, encoding_mode: SOS
16:30:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
16:30:15:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 0
16:30:15:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
16:30:15:elinks:INFO:	Disabling clock on downlink 0
16:30:15:elinks:INFO:	Disabling clock on downlink 1
16:30:15:elinks:INFO:	Disabling clock on downlink 2
16:30:15:setup_element:INFO:	Checking SOS, encoding_mode: SOS
16:30:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
16:30:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
16:30:16:elinks:INFO:	Disabling clock on downlink 0
16:30:16:elinks:INFO:	Disabling clock on downlink 1
16:30:16:elinks:INFO:	Disabling clock on downlink 2
16:30:16:setup_element:INFO:	Checking SOS, encoding_mode: SOS
16:30:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
16:30:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
16:30:16:setup_element:INFO:	Scanning clock phase
16:30:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
16:30:16:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
16:30:16:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
16:30:16:setup_element:INFO:	Eye window for uplink 0 : _____________________________________________________XXXXX______________________
Clock Delay: 15
16:30:16:setup_element:INFO:	Setting the clock phase to 15 for group 0, downlink 0
16:30:16:setup_element:INFO:	Scanning data phases
16:30:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
16:30:16:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
16:30:21:setup_element:INFO:	Data phase scan results for group 0, downlink 0
16:30:21:setup_element:INFO:	Eye window for uplink 0 : _____XXXX_______________________________
Data delay found: 26
16:30:21:setup_element:INFO:	Setting the data phase to 26 for uplink 0
16:30:21:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 15
    Window Length: 75
    Eye Windows:
      Uplink  0: _____________________________________________________XXXXX______________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 26
      Window Length: 36
      Eye Window: _____XXXX_______________________________
]
16:30:21:setup_element:INFO:	Beginning SMX ASICs map scan
16:30:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
16:30:21:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
16:30:21:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
16:30:21:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
16:30:21:uplink:INFO:	Setting uplinks mask [0]
16:30:22:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 0
16:30:24:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map:
    ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
  Clock Phase Characteristic:
    Optimal Phase: 15
    Window Length: 75
    Eye Windows:
      Uplink  0: _____________________________________________________XXXXX______________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 26
      Window Length: 36
      Eye Window: _____XXXX_______________________________

16:30:24:setup_element:INFO:	Performing Elink synchronization
16:30:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
16:30:24:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
16:30:24:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
16:30:24:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
16:30:24:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
16:30:24:uplink:INFO:	Enabling uplinks [0]
16:30:24:ST3_emu:INFO:	Number of chips: 1
16:30:24:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
16:30:25:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
 ============== Starting SMX ID burn ==============
16:30:29:asictest:WARNING:	Fused ID is not zero 6359364699117614978
16:30:30:asictest:INFO:	 Starting ADC calibration/scan 
16:30:36:asictest:INFO:	0,	0,	0.000000
16:30:41:asictest:INFO:	1,	43,	0.300000
16:30:47:asictest:INFO:	2,	87,	0.600000
16:30:53:asictest:INFO:	3,	136,	0.900000
16:30:59:asictest:INFO:	4,	186,	1.200000
16:31:05:asictest:INFO:	5,	203,	1.300000
16:31:10:asictest:INFO:	T [C] Vddm[mV] CSA [mV] AUX [mV]
16:31:11:asictest:INFO:	 27.01 1195.53  874.02    0.00
16:31:12:ST3_smx:INFO:	chip: 0-7 	 27.009523 C 	 1201.268621 mV
16:31:12:ST3_smx:INFO:	# loops 0
16:31:14:ST3_smx:INFO:	# loops 1
16:31:16:ST3_smx:INFO:	# loops 2
16:31:17:ST3_smx:INFO:	# loops 3
16:31:19:ST3_smx:INFO:	# loops 4
16:31:21:ST3_smx:INFO:	Total # of broken channels: 0
16:31:21:ST3_smx:INFO:	List of broken channels: []
16:31:21:ST3_smx:INFO:	Total # of broken channels: 0
16:31:21:ST3_smx:INFO:	List of broken channels: []
16:31:22:asictest:INFO:	 Starting CSA scan -
16:31:22:asictest:INFO:	0,	0.062700
16:31:23:asictest:INFO:	9,	0.143700
16:31:24:asictest:INFO:	18,	0.216900
16:31:24:asictest:INFO:	27,	0.285200
16:31:25:asictest:INFO:	36,	0.350400
16:31:26:asictest:INFO:	45,	0.415600
16:31:26:asictest:INFO:	54,	0.483000
16:31:27:asictest:INFO:	63,	0.536000
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_10_17-16_30_14
OPERATOR  : Robert V.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 0311L020-M002 | side-N | index: (6/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
  HW_ADDR : 0x7 | VERS_NO : 2.2
  ASIC_ID : XA-000-08-002-001-007-120-02 | FUSED_ID : 6359364699117614978
  IC_TEMP :   20.59 | VDDM : 1131.87 | AUX_INT :    0.00 | CsaBias :  170.10
  CONF_FAIL_REG : 0
  CSA_BIAS : 15
  THR2_GLB : 30
  ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
  ADC_Chi2/NDF : 5.14796e-05 / 1
  ADC_P0  : 0.00000e+00 ± 7.17493e-03
  ADC_P1  : 7.18048e-03 ± 1.16328e-04
  ADC_P2  : -3.88195e-06 ± 6.46867e-07
  CSA_Chi2/NDF : 4.22067e-05 / 1
  CSA_P0  : 6.46542e-02 ± 2.44526e-03
  CSA_P1  : 8.69517e-03 ± 1.81320e-04
  CSA_P2  : -1.89521e-05 ± 2.76736e-06
---------------------------------------
N_BROKEN_DISC :  0 | N_BROKEN_FAST :  []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.5646', '1.800', '0.0849', '1.800', '0.1593', '7.000', '0.6887']
VI_after__Init : ['1.200', '0.5604', '1.800', '0.0837', '1.800', '0.1590', '7.000', '0.6896']
VI_at__the_End : ['1.200', '0.5354', '1.800', '0.0728', '1.800', '0.1633', '7.000', '0.6894']
16:31:34:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-001-007-120-02//TestDate_2023_10_17-16_30_14/