XA-000-08-002-001-007-144-03    29.08.23 12:51:18

ADC4
cADCscan.png
SMX_7
SMX_7.png
CSA
cCSAscan.png
Calibration
ADC
p0.svg
p1.svg
CSA
p0.svg
p2.svg
p1.svg
Report.txt
            12:51:18:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:51:18:ST3_Shared:INFO:	-------------------------Microcable-------------------------
12:51:18:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:51:20:smx_tester:INFO:	Scanning setup
12:51:20:elinks:INFO:	Disabling clock on downlink 0
12:51:20:elinks:INFO:	Disabling clock on downlink 1
12:51:20:elinks:INFO:	Disabling clock on downlink 2
12:51:20:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:51:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:51:20:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 0
12:51:20:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:51:20:elinks:INFO:	Disabling clock on downlink 0
12:51:20:elinks:INFO:	Disabling clock on downlink 1
12:51:20:elinks:INFO:	Disabling clock on downlink 2
12:51:20:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:51:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:51:20:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:51:20:elinks:INFO:	Disabling clock on downlink 0
12:51:20:elinks:INFO:	Disabling clock on downlink 1
12:51:20:elinks:INFO:	Disabling clock on downlink 2
12:51:20:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:51:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:51:20:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:51:20:setup_element:INFO:	Scanning clock phase
12:51:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:51:20:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:51:21:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
12:51:21:setup_element:INFO:	Eye window for uplink 0 : _____________________________________________________XXXXXX_____________________
Clock Delay: 15
12:51:21:setup_element:INFO:	Setting the clock phase to 15 for group 0, downlink 0
12:51:21:setup_element:INFO:	Scanning data phases
12:51:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:51:21:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:51:26:setup_element:INFO:	Data phase scan results for group 0, downlink 0
12:51:26:setup_element:INFO:	Eye window for uplink 0 : _____XXX________________________________
Data delay found: 26
12:51:26:setup_element:INFO:	Setting the data phase to 26 for uplink 0
12:51:26:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 15
    Window Length: 74
    Eye Windows:
      Uplink  0: _____________________________________________________XXXXXX_____________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 26
      Window Length: 37
      Eye Window: _____XXX________________________________
]
12:51:26:setup_element:INFO:	Beginning SMX ASICs map scan
12:51:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:51:26:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:51:26:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
12:51:26:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
12:51:26:uplink:INFO:	Setting uplinks mask [0]
12:51:27:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 0
12:51:28:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map:
    ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
  Clock Phase Characteristic:
    Optimal Phase: 15
    Window Length: 74
    Eye Windows:
      Uplink  0: _____________________________________________________XXXXXX_____________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 26
      Window Length: 37
      Eye Window: _____XXX________________________________

12:51:28:setup_element:INFO:	Performing Elink synchronization
12:51:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:51:28:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:51:28:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
12:51:28:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
12:51:28:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
12:51:28:uplink:INFO:	Enabling uplinks [0]
12:51:28:ST3_emu:INFO:	Number of chips: 1
12:51:28:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
12:51:29:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
 ============== Starting SMX ID burn ==============
12:51:33:asictest:WARNING:	Fused ID is not zero 6359364699117615363
12:51:33:asictest:INFO:	 Starting ADC calibration/scan 
12:51:39:asictest:INFO:	0,	0,	0.000000
12:51:45:asictest:INFO:	1,	39,	0.300000
12:51:51:asictest:INFO:	2,	78,	0.600000
12:51:56:asictest:INFO:	3,	122,	0.900000
12:52:02:asictest:INFO:	4,	168,	1.200000
12:52:08:asictest:INFO:	5,	184,	1.300000
12:52:13:asictest:INFO:	T [C] Vddm[mV] CSA [mV] AUX [mV]
12:52:14:asictest:INFO:	 17.82 1200.30  804.24    0.00
12:52:15:ST3_smx:INFO:	chip: 0-7 	 17.824236 C 	 1200.300242 mV
12:52:15:ST3_smx:INFO:	# loops 0
12:52:17:ST3_smx:INFO:	# loops 1
12:52:19:ST3_smx:INFO:	# loops 2
12:52:20:ST3_smx:INFO:	# loops 3
12:52:22:ST3_smx:INFO:	# loops 4
12:52:23:ST3_smx:INFO:	Total # of broken channels: 0
12:52:23:ST3_smx:INFO:	List of broken channels: []
12:52:23:ST3_smx:INFO:	Total # of broken channels: 0
12:52:23:ST3_smx:INFO:	List of broken channels: []
12:52:24:asictest:INFO:	 Starting CSA scan -
12:52:25:asictest:INFO:	0,	0.064800
12:52:26:asictest:INFO:	9,	0.150700
12:52:26:asictest:INFO:	18,	0.228700
12:52:27:asictest:INFO:	27,	0.304600
12:52:28:asictest:INFO:	36,	0.377800
12:52:28:asictest:INFO:	45,	0.444200
12:52:29:asictest:INFO:	54,	0.501000
12:52:30:asictest:INFO:	63,	0.538000
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_08_29-12_51_18
OPERATOR  : Kerstin S.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 0068L017-M001 | side-N | index: (5/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
  HW_ADDR : 0x7 | VERS_NO : 2.2
  ASIC_ID : XA-000-08-002-001-007-144-03 | FUSED_ID : 6359364699117615363
  IC_TEMP :    3.70 | VDDM : 1117.56 | AUX_INT :    0.00 | CsaBias :  103.02
  CONF_FAIL_REG : 0
  CSA_BIAS : 15
  THR2_GLB : 30
  ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
  ADC_Chi2/NDF : 1.42897e-07 / 0
  ADC_P0  : 0.00000e+00 ± 1.00000e+00
  ADC_P1  : 7.99023e-03 ± 2.65494e-02
  ADC_P2  : -5.03327e-06 ± 1.58320e-04
  CSA_Chi2/NDF : 1.33871e-04 / 0
  CSA_P0  : 6.19333e-02 ± 4.35489e-03
  CSA_P1  : 1.02401e-02 ± 3.22923e-04
  CSA_P2  : -4.11082e-05 ± 4.92854e-06
---------------------------------------
N_BROKEN_DISC :  0 | N_BROKEN_FAST :  []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.2708', '1.800', '0.1145', '1.800', '0.1565', '7.000', '0.6892']
VI_after__Init : ['1.200', '0.2719', '1.800', '0.1121', '1.800', '0.1549', '7.000', '0.6900']
VI_at__the_End : ['1.200', '0.5376', '1.800', '0.0745', '1.800', '0.1706', '7.000', '0.6901']
12:52:43:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-001-007-144-03//TestDate_2023_08_29-12_51_18/