
XA-000-08-002-001-008-091-08 11.09.23 13:23:40
ADC4

SMX_7

CSA

Calibration
ADC
CSA
Report.txt
13:23:40:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:23:40:ST3_Shared:INFO: -------------------------Microcable------------------------- 13:23:40:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:23:42:smx_tester:INFO: Scanning setup 13:23:42:elinks:INFO: Disabling clock on downlink 0 13:23:42:elinks:INFO: Disabling clock on downlink 1 13:23:42:elinks:INFO: Disabling clock on downlink 2 13:23:42:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:23:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 13:23:42:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0 13:23:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:23:42:elinks:INFO: Disabling clock on downlink 0 13:23:42:elinks:INFO: Disabling clock on downlink 1 13:23:42:elinks:INFO: Disabling clock on downlink 2 13:23:42:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:23:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:23:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:23:42:elinks:INFO: Disabling clock on downlink 0 13:23:42:elinks:INFO: Disabling clock on downlink 1 13:23:42:elinks:INFO: Disabling clock on downlink 2 13:23:42:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:23:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:23:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:23:42:setup_element:INFO: Scanning clock phase 13:23:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 13:23:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 13:23:42:setup_element:INFO: Clock phase scan results for group 0, downlink 0 13:23:42:setup_element:INFO: Eye window for uplink 0 : ____________________________________________________XXXXXXX_____________________ Clock Delay: 15 13:23:42:setup_element:INFO: Setting the clock phase to 15 for group 0, downlink 0 13:23:42:setup_element:INFO: Scanning data phases 13:23:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 13:23:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 13:23:47:setup_element:INFO: Data phase scan results for group 0, downlink 0 13:23:47:setup_element:INFO: Eye window for uplink 0 : __XXXXX_________________________________ Data delay found: 24 13:23:47:setup_element:INFO: Setting the data phase to 24 for uplink 0 13:23:47:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 0 Uplinks: [0] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 15 Window Length: 73 Eye Windows: Uplink 0: ____________________________________________________XXXXXXX_____________________ Data phase characteristics: Uplink 0: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ ] 13:23:47:setup_element:INFO: Beginning SMX ASICs map scan 13:23:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 13:23:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 13:23:47:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 13:23:47:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 13:23:47:uplink:INFO: Setting uplinks mask [0] 13:23:49:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0 13:23:50:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 0 Uplinks: [0] ASICs Map: ASIC address 0x7: (ASIC uplink, uplink): (0, 0) Clock Phase Characteristic: Optimal Phase: 15 Window Length: 73 Eye Windows: Uplink 0: ____________________________________________________XXXXXXX_____________________ Data phase characteristics: Uplink 0: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ 13:23:50:setup_element:INFO: Performing Elink synchronization 13:23:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 13:23:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 13:23:50:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 13:23:50:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 13:23:50:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0 13:23:50:uplink:INFO: Enabling uplinks [0] 13:23:50:ST3_emu:INFO: Number of chips: 1 13:23:50:ST3_emu:INFO: Chip address: 0x7 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7 13:23:51:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values ============== Starting SMX ID burn ============== 13:23:54:asictest:WARNING: Fused ID is not zero 6359364699117618616 13:23:55:asictest:INFO: Starting ADC calibration/scan 13:24:01:asictest:INFO: 0, 2, 0.000000 13:24:07:asictest:INFO: 1, 45, 0.300000 13:24:12:asictest:INFO: 2, 81, 0.600000 13:24:18:asictest:INFO: 3, 126, 0.900000 13:24:24:asictest:INFO: 4, 175, 1.200000 13:24:30:asictest:INFO: 5, 194, 1.300000 13:24:35:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV] 13:24:35:asictest:INFO: 8.49 1201.88 777.02 15.84 13:24:37:ST3_smx:INFO: chip: 0-7 8.485653 C 1207.603069 mV 13:24:37:ST3_smx:INFO: # loops 0 13:24:38:ST3_smx:INFO: # loops 1 13:24:40:ST3_smx:INFO: # loops 2 13:24:41:ST3_smx:INFO: # loops 3 13:24:43:ST3_smx:INFO: # loops 4 13:24:44:ST3_smx:INFO: Total # of broken channels: 0 13:24:44:ST3_smx:INFO: List of broken channels: [] 13:24:44:ST3_smx:INFO: Total # of broken channels: 0 13:24:44:ST3_smx:INFO: List of broken channels: [] 13:24:46:asictest:INFO: Starting CSA scan - 13:24:46:asictest:INFO: 0, 0.064100 13:24:47:asictest:INFO: 9, 0.150400 13:24:48:asictest:INFO: 18, 0.231100 13:24:48:asictest:INFO: 27, 0.310100 13:24:49:asictest:INFO: 36, 0.382300 13:24:50:asictest:INFO: 45, 0.447600 13:24:50:asictest:INFO: 54, 0.492900 13:24:51:asictest:INFO: 63, 0.516500 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : Microcable TEST_DATE : 2023_09_11-13_23_40 OPERATOR : Olga B.; Oleksandr S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : 0123L019-M001 | side-P | index: (4/8) --------------------------------------- --------------------------------------- ASIC_CONFIG_PARAMETERS HW_ADDR : 0x7 | VERS_NO : 2.2 ASIC_ID : XA-000-08-002-001-008-091-08 | FUSED_ID : 6359364699117618616 IC_TEMP : 1.76 | VDDM : 1066.90 | AUX_INT : 0.00 | CsaBias : 102.07 CONF_FAIL_REG : 0 CSA_BIAS : 15 THR2_GLB : 30 ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122 ADC_Chi2/NDF : 2.51933e-05 / 1 ADC_P0 : 0.00000e+00 ± 5.01929e-03 ADC_P1 : 7.93324e-03 ± 8.38851e-05 ADC_P2 : -6.27473e-06 ± 4.90801e-07 CSA_Chi2/NDF : 3.12910e-04 / 1 CSA_P0 : 5.80583e-02 ± 6.65799e-03 CSA_P1 : 1.10689e-02 ± 4.93703e-04 CSA_P2 : -5.80982e-05 ± 7.53503e-06 --------------------------------------- N_BROKEN_DISC : 0 | N_BROKEN_FAST : [] N_BROKEN_CABLE : 0 LIST_OF_BROKEN_CABLES : [] --------------------------------------- VI_before_Init : ['1.198', '0.2279', '1.801', '0.0736', '1.800', '0.1362', '7.000', '0.6891'] VI_after__Init : ['1.200', '0.2308', '1.800', '0.0735', '1.800', '0.1376', '7.000', '0.6898'] VI_at__the_End : ['1.200', '0.5157', '1.800', '0.0672', '1.800', '0.1422', '7.000', '0.6896'] 13:24:58:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-001-008-091-08//TestDate_2023_09_11-13_23_40/