XA-000-08-002-001-008-103-01    07.09.23 13:45:56

ADC4
cADCscan.png
SMX_7
SMX_7.png
CSA
cCSAscan.png
Calibration
ADC
p0.svg
p1.svg
CSA
p0.svg
p2.svg
p1.svg
Report.txt
            13:45:56:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:45:56:ST3_Shared:INFO:	-------------------------Microcable-------------------------
13:45:56:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:45:57:smx_tester:INFO:	Scanning setup
13:45:57:elinks:INFO:	Disabling clock on downlink 0
13:45:57:elinks:INFO:	Disabling clock on downlink 1
13:45:57:elinks:INFO:	Disabling clock on downlink 2
13:45:57:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:45:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:45:58:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 0
13:45:58:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:45:58:elinks:INFO:	Disabling clock on downlink 0
13:45:58:elinks:INFO:	Disabling clock on downlink 1
13:45:58:elinks:INFO:	Disabling clock on downlink 2
13:45:58:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:45:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:45:58:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:45:58:elinks:INFO:	Disabling clock on downlink 0
13:45:58:elinks:INFO:	Disabling clock on downlink 1
13:45:58:elinks:INFO:	Disabling clock on downlink 2
13:45:58:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:45:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:45:58:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:45:58:setup_element:INFO:	Scanning clock phase
13:45:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:45:58:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:45:58:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
13:45:58:setup_element:INFO:	Eye window for uplink 0 : __________________________________________________XXXXXXX_______________________
Clock Delay: 13
13:45:58:setup_element:INFO:	Setting the clock phase to 13 for group 0, downlink 0
13:45:58:setup_element:INFO:	Scanning data phases
13:45:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:45:58:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:46:03:setup_element:INFO:	Data phase scan results for group 0, downlink 0
13:46:03:setup_element:INFO:	Eye window for uplink 0 : __XXX___________________________________
Data delay found: 23
13:46:03:setup_element:INFO:	Setting the data phase to 23 for uplink 0
13:46:03:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 13
    Window Length: 73
    Eye Windows:
      Uplink  0: __________________________________________________XXXXXXX_______________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 23
      Window Length: 37
      Eye Window: __XXX___________________________________
]
13:46:03:setup_element:INFO:	Beginning SMX ASICs map scan
13:46:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:46:03:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:46:03:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
13:46:03:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
13:46:03:uplink:INFO:	Setting uplinks mask [0]
13:46:04:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 0
13:46:06:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map:
    ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
  Clock Phase Characteristic:
    Optimal Phase: 13
    Window Length: 73
    Eye Windows:
      Uplink  0: __________________________________________________XXXXXXX_______________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 23
      Window Length: 37
      Eye Window: __XXX___________________________________

13:46:06:setup_element:INFO:	Performing Elink synchronization
13:46:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:46:06:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:46:06:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
13:46:06:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
13:46:06:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
13:46:06:uplink:INFO:	Enabling uplinks [0]
13:46:06:ST3_emu:INFO:	Number of chips: 1
13:46:06:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
13:46:07:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
 ============== Starting SMX ID burn ==============
13:46:10:asictest:WARNING:	Fused ID is not zero 6359364699117618801
13:46:11:asictest:INFO:	 Starting ADC calibration/scan 
13:46:17:asictest:INFO:	0,	0,	0.000000
13:46:22:asictest:INFO:	1,	42,	0.300000
13:46:28:asictest:INFO:	2,	84,	0.600000
13:46:34:asictest:INFO:	3,	131,	0.900000
13:46:40:asictest:INFO:	4,	180,	1.200000
13:46:45:asictest:INFO:	5,	196,	1.300000
13:46:51:asictest:INFO:	T [C] Vddm[mV] CSA [mV] AUX [mV]
13:46:51:asictest:INFO:	 22.15 1203.15  826.61    0.00
13:46:53:ST3_smx:INFO:	chip: 0-7 	 22.149781 C 	 1203.150156 mV
13:46:53:ST3_smx:INFO:	# loops 0
13:46:54:ST3_smx:INFO:	# loops 1
13:46:56:ST3_smx:INFO:	# loops 2
13:46:57:ST3_smx:INFO:	# loops 3
13:46:59:ST3_smx:INFO:	# loops 4
13:47:01:ST3_smx:INFO:	Total # of broken channels: 0
13:47:01:ST3_smx:INFO:	List of broken channels: []
13:47:01:ST3_smx:INFO:	Total # of broken channels: 0
13:47:01:ST3_smx:INFO:	List of broken channels: []
13:47:02:asictest:INFO:	 Starting CSA scan -
13:47:02:asictest:INFO:	0,	0.063700
13:47:03:asictest:INFO:	9,	0.145500
13:47:04:asictest:INFO:	18,	0.219800
13:47:04:asictest:INFO:	27,	0.290200
13:47:05:asictest:INFO:	36,	0.360600
13:47:06:asictest:INFO:	45,	0.426700
13:47:06:asictest:INFO:	54,	0.485600
13:47:07:asictest:INFO:	63,	0.531500
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_09_07-13_45_56
OPERATOR  : Robert V.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 0115L019-M000 | side-P | index: (8/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
  HW_ADDR : 0x7 | VERS_NO : 2.2
  ASIC_ID : XA-000-08-002-001-008-103-01 | FUSED_ID : 6359364699117618801
  IC_TEMP :   15.52 | VDDM : 1125.59 | AUX_INT :    0.00 | CsaBias :  125.54
  CONF_FAIL_REG : 0
  CSA_BIAS : 15
  THR2_GLB : 30
  ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
  ADC_Chi2/NDF : 4.66778e-05 / 1
  ADC_P0  : 0.00000e+00 ± 6.83212e-03
  ADC_P1  : 7.45777e-03 ± 1.14523e-04
  ADC_P2  : -4.29777e-06 ± 6.59027e-07
  CSA_Chi2/NDF : 5.17455e-05 / 1
  CSA_P0  : 6.28583e-02 ± 2.70751e-03
  CSA_P1  : 9.32831e-03 ± 2.00767e-04
  CSA_P2  : -2.91005e-05 ± 3.06416e-06
---------------------------------------
N_BROKEN_DISC :  0 | N_BROKEN_FAST :  []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.4261', '1.800', '0.1034', '1.801', '0.1561', '7.000', '0.6890']
VI_after__Init : ['1.200', '0.4340', '1.800', '0.1027', '1.800', '0.1561', '7.000', '0.6901']
VI_at__the_End : ['1.200', '0.5308', '1.800', '0.0735', '1.800', '0.1577', '7.000', '0.6899']
13:48:12:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-001-008-103-01//TestDate_2023_09_07-13_45_56/
13:51:05:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-001-008-103-01//TestDate_2023_09_07-13_45_56/