XA-000-08-002-001-008-113-06 01.09.23 09:02:36
ADC4
SMX_7
CSA
Calibration
ADC
CSA
Info
09:02:36:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:02:36:ST3_Shared:INFO: -------------------------Microcable-------------------------
09:02:36:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:02:37:smx_tester:INFO: Scanning setup
09:02:37:elinks:INFO: Disabling clock on downlink 0
09:02:37:elinks:INFO: Disabling clock on downlink 1
09:02:37:elinks:INFO: Disabling clock on downlink 2
09:02:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:02:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:02:38:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
09:02:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:02:38:elinks:INFO: Disabling clock on downlink 0
09:02:38:elinks:INFO: Disabling clock on downlink 1
09:02:38:elinks:INFO: Disabling clock on downlink 2
09:02:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:02:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:02:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:02:38:elinks:INFO: Disabling clock on downlink 0
09:02:38:elinks:INFO: Disabling clock on downlink 1
09:02:38:elinks:INFO: Disabling clock on downlink 2
09:02:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:02:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:02:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:02:38:setup_element:INFO: Scanning clock phase
09:02:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:02:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:02:38:setup_element:INFO: Clock phase scan results for group 0, downlink 0
09:02:38:setup_element:INFO: Eye window for uplink 0 : ____________________________________________________XXXXXX______________________
Clock Delay: 14
09:02:38:setup_element:INFO: Setting the clock phase to 14 for group 0, downlink 0
09:02:38:setup_element:INFO: Scanning data phases
09:02:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:02:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:02:43:setup_element:INFO: Data phase scan results for group 0, downlink 0
09:02:43:setup_element:INFO: Eye window for uplink 0 : _XXXX__________________________________X
Data delay found: 21
09:02:43:setup_element:INFO: Setting the data phase to 21 for uplink 0
09:02:43:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 14
Window Length: 74
Eye Windows:
Uplink 0: ____________________________________________________XXXXXX______________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 21
Window Length: 34
Eye Window: _XXXX__________________________________X
]
09:02:43:setup_element:INFO: Beginning SMX ASICs map scan
09:02:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:02:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:02:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
09:02:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
09:02:43:uplink:INFO: Setting uplinks mask [0]
09:02:44:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0
09:02:45:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map:
ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
Clock Phase Characteristic:
Optimal Phase: 14
Window Length: 74
Eye Windows:
Uplink 0: ____________________________________________________XXXXXX______________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 21
Window Length: 34
Eye Window: _XXXX__________________________________X
09:02:45:setup_element:INFO: Performing Elink synchronization
09:02:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:02:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:02:45:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
09:02:45:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
09:02:45:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
09:02:45:uplink:INFO: Enabling uplinks [0]
09:02:45:ST3_emu:INFO: Number of chips: 1
09:02:45:ST3_emu:INFO: Chip address: 0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
09:02:46:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
============== Starting SMX ID burn ==============
09:02:50:asictest:WARNING: Fused ID is not zero 6359364699117618966
09:02:51:asictest:INFO: Starting ADC calibration/scan
09:02:56:asictest:INFO: 0, 0, 0.000000
09:03:02:asictest:INFO: 1, 45, 0.300000
09:03:08:asictest:INFO: 2, 91, 0.600000
09:03:13:asictest:INFO: 3, 142, 0.900000
09:03:19:asictest:INFO: 4, 196, 1.200000
09:03:25:asictest:INFO: 5, 215, 1.300000
09:03:31:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV]
09:03:31:asictest:INFO: 18.21 1200.25 832.58 0.00
09:03:32:ST3_smx:INFO: chip: 0-7 18.214145 C 1200.245301 mV
09:03:32:ST3_smx:INFO: # loops 0
09:03:34:ST3_smx:INFO: # loops 1
09:03:36:ST3_smx:INFO: # loops 2
09:03:37:ST3_smx:INFO: # loops 3
09:03:39:ST3_smx:INFO: # loops 4
09:03:41:ST3_smx:INFO: Total # of broken channels: 0
09:03:41:ST3_smx:INFO: List of broken channels: []
09:03:41:ST3_smx:INFO: Total # of broken channels: 0
09:03:41:ST3_smx:INFO: List of broken channels: []
09:03:42:asictest:INFO: Starting CSA scan -
09:03:43:asictest:INFO: 0, 0.065200
09:03:43:asictest:INFO: 9, 0.145900
09:03:44:asictest:INFO: 18, 0.219500
09:03:45:asictest:INFO: 27, 0.289200
09:03:45:asictest:INFO: 36, 0.358300
09:03:46:asictest:INFO: 45, 0.424300
09:03:47:asictest:INFO: 54, 0.483200
09:03:47:asictest:INFO: 63, 0.529800
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_09_01-09_02_36
OPERATOR : Olga B.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID : 0000L000-M000 | side-N | index: (5/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
HW_ADDR : 0x7 | VERS_NO : 2.2
ASIC_ID : XA-000-08-002-001-008-113-06 | FUSED_ID : 6359364699117618966
IC_TEMP : 15.18 | VDDM : 1119.94 | AUX_INT : 0.00 | CsaBias : 137.45
CONF_FAIL_REG : 0
CSA_BIAS : 15
THR2_GLB : 30
ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
ADC_Chi2/NDF : 9.84089e-06 / 1
ADC_P0 : 0.00000e+00 ± 3.13702e-03
ADC_P1 : 6.95758e-03 ± 4.76804e-05
ADC_P2 : -4.25448e-06 ± 2.50787e-07
CSA_Chi2/NDF : 4.39938e-05 / 1
CSA_P0 : 6.45500e-02 ± 2.49649e-03
CSA_P1 : 9.17196e-03 ± 1.85119e-04
CSA_P2 : -2.75426e-05 ± 2.82534e-06
---------------------------------------
N_BROKEN_DISC : 0 | N_BROKEN_FAST : []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.3114', '1.800', '0.0863', '1.800', '0.1489', '7.000', '0.6870']
VI_after__Init : ['1.200', '0.3132', '1.800', '0.0851', '1.800', '0.1461', '7.000', '0.6883']
VI_at__the_End : ['1.200', '0.5305', '1.800', '0.0731', '1.800', '0.1422', '7.000', '0.6885']
09:03:51:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-001-008-113-06//TestDate_2023_09_01-09_02_36/
Comment
J076, UK module