XA-000-08-002-001-008-117-06 01.09.23 09:04:23
ADC4
SMX_7
CSA
Calibration
ADC
CSA
Info
09:04:23:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:04:23:ST3_Shared:INFO: -------------------------Microcable-------------------------
09:04:23:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:04:24:smx_tester:INFO: Scanning setup
09:04:24:elinks:INFO: Disabling clock on downlink 0
09:04:24:elinks:INFO: Disabling clock on downlink 1
09:04:24:elinks:INFO: Disabling clock on downlink 2
09:04:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:04:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:04:24:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
09:04:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:04:24:elinks:INFO: Disabling clock on downlink 0
09:04:24:elinks:INFO: Disabling clock on downlink 1
09:04:24:elinks:INFO: Disabling clock on downlink 2
09:04:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:04:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:04:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:04:25:elinks:INFO: Disabling clock on downlink 0
09:04:25:elinks:INFO: Disabling clock on downlink 1
09:04:25:elinks:INFO: Disabling clock on downlink 2
09:04:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:04:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:04:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:04:25:setup_element:INFO: Scanning clock phase
09:04:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:04:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:04:25:setup_element:INFO: Clock phase scan results for group 0, downlink 0
09:04:25:setup_element:INFO: Eye window for uplink 0 : _____________________________________________________XXXXXXX____________________
Clock Delay: 16
09:04:25:setup_element:INFO: Setting the clock phase to 16 for group 0, downlink 0
09:04:25:setup_element:INFO: Scanning data phases
09:04:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:04:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:04:30:setup_element:INFO: Data phase scan results for group 0, downlink 0
09:04:30:setup_element:INFO: Eye window for uplink 0 : ____XXXX________________________________
Data delay found: 25
09:04:30:setup_element:INFO: Setting the data phase to 25 for uplink 0
09:04:30:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 16
Window Length: 73
Eye Windows:
Uplink 0: _____________________________________________________XXXXXXX____________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 25
Window Length: 36
Eye Window: ____XXXX________________________________
]
09:04:30:setup_element:INFO: Beginning SMX ASICs map scan
09:04:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:04:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:04:30:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
09:04:30:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
09:04:30:uplink:INFO: Setting uplinks mask [0]
09:04:31:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0
09:04:33:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map:
ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
Clock Phase Characteristic:
Optimal Phase: 16
Window Length: 73
Eye Windows:
Uplink 0: _____________________________________________________XXXXXXX____________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 25
Window Length: 36
Eye Window: ____XXXX________________________________
09:04:33:setup_element:INFO: Performing Elink synchronization
09:04:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:04:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:04:33:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
09:04:33:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
09:04:33:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
09:04:33:uplink:INFO: Enabling uplinks [0]
09:04:33:ST3_emu:INFO: Number of chips: 1
09:04:33:ST3_emu:INFO: Chip address: 0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
09:04:34:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
============== Starting SMX ID burn ==============
09:04:37:asictest:WARNING: Fused ID is not zero 6359364699117619030
09:04:38:asictest:INFO: Starting ADC calibration/scan
09:04:43:asictest:INFO: 0, 0, 0.000000
09:04:49:asictest:INFO: 1, 42, 0.300000
09:04:55:asictest:INFO: 2, 84, 0.600000
09:05:01:asictest:INFO: 3, 131, 0.900000
09:05:06:asictest:INFO: 4, 180, 1.200000
09:05:12:asictest:INFO: 5, 197, 1.300000
09:05:18:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV]
09:05:18:asictest:INFO: 21.77 1200.59 814.00 0.00
09:05:20:ST3_smx:INFO: chip: 0-7 21.766424 C 1200.587935 mV
09:05:20:ST3_smx:INFO: # loops 0
09:05:21:ST3_smx:INFO: # loops 1
09:05:23:ST3_smx:INFO: # loops 2
09:05:24:ST3_smx:INFO: # loops 3
09:05:26:ST3_smx:INFO: # loops 4
09:05:28:ST3_smx:INFO: Total # of broken channels: 0
09:05:28:ST3_smx:INFO: List of broken channels: []
09:05:28:ST3_smx:INFO: Total # of broken channels: 0
09:05:28:ST3_smx:INFO: List of broken channels: []
09:05:29:asictest:INFO: Starting CSA scan -
09:05:29:asictest:INFO: 0, 0.063200
09:05:30:asictest:INFO: 9, 0.143100
09:05:31:asictest:INFO: 18, 0.217000
09:05:31:asictest:INFO: 27, 0.287600
09:05:32:asictest:INFO: 36, 0.358000
09:05:33:asictest:INFO: 45, 0.423500
09:05:33:asictest:INFO: 54, 0.483100
09:05:34:asictest:INFO: 63, 0.530800
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_09_01-09_04_23
OPERATOR : Olga B.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID : 0000L000-M000 | side-N | index: (6/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
HW_ADDR : 0x7 | VERS_NO : 2.2
ASIC_ID : XA-000-08-002-001-008-117-06 | FUSED_ID : 6359364699117619030
IC_TEMP : 11.85 | VDDM : 1129.74 | AUX_INT : 0.00 | CsaBias : 133.36
CONF_FAIL_REG : 0
CSA_BIAS : 15
THR2_GLB : 30
ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
ADC_Chi2/NDF : 1.99388e-05 / 1
ADC_P0 : 0.00000e+00 ± 4.46529e-03
ADC_P1 : 7.49077e-03 ± 7.43154e-05
ADC_P2 : -4.56019e-06 ± 4.26284e-07
CSA_Chi2/NDF : 4.13053e-05 / 1
CSA_P0 : 6.21042e-02 ± 2.41900e-03
CSA_P1 : 9.18208e-03 ± 1.79374e-04
CSA_P2 : -2.68445e-05 ± 2.73765e-06
---------------------------------------
N_BROKEN_DISC : 0 | N_BROKEN_FAST : []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.2822', '1.800', '0.0876', '1.800', '0.1386', '6.999', '0.6877']
VI_after__Init : ['1.200', '0.2840', '1.800', '0.0842', '1.800', '0.1376', '7.000', '0.6889']
VI_at__the_End : ['1.200', '0.5303', '1.800', '0.0711', '1.800', '0.1589', '7.000', '0.6890']
09:05:42:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-001-008-117-06//TestDate_2023_09_01-09_04_23/
Comment
J076, UK module