XA-000-08-002-001-008-118-06    01.09.23 09:06:21

ADC4
cADCscan.png
SMX_7
SMX_7.png
CSA
cCSAscan.png
Calibration
ADC
p0.svg
p1.svg
CSA
p0.svg
p2.svg
p1.svg
Report.txt
            09:06:21:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:06:21:ST3_Shared:INFO:	-------------------------Microcable-------------------------
09:06:21:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:06:23:smx_tester:INFO:	Scanning setup
09:06:23:elinks:INFO:	Disabling clock on downlink 0
09:06:23:elinks:INFO:	Disabling clock on downlink 1
09:06:23:elinks:INFO:	Disabling clock on downlink 2
09:06:23:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:06:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:06:23:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 0
09:06:23:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:06:23:elinks:INFO:	Disabling clock on downlink 0
09:06:23:elinks:INFO:	Disabling clock on downlink 1
09:06:23:elinks:INFO:	Disabling clock on downlink 2
09:06:23:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:06:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:06:23:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:06:23:elinks:INFO:	Disabling clock on downlink 0
09:06:23:elinks:INFO:	Disabling clock on downlink 1
09:06:23:elinks:INFO:	Disabling clock on downlink 2
09:06:23:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:06:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:06:23:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:06:23:setup_element:INFO:	Scanning clock phase
09:06:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:06:23:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:06:24:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
09:06:24:setup_element:INFO:	Eye window for uplink 0 : ____________________________________________________XXXXXXXX____________________
Clock Delay: 15
09:06:24:setup_element:INFO:	Setting the clock phase to 15 for group 0, downlink 0
09:06:24:setup_element:INFO:	Scanning data phases
09:06:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:06:24:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:06:29:setup_element:INFO:	Data phase scan results for group 0, downlink 0
09:06:29:setup_element:INFO:	Eye window for uplink 0 : __XXXX__________________________________
Data delay found: 23
09:06:29:setup_element:INFO:	Setting the data phase to 23 for uplink 0
09:06:29:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 15
    Window Length: 72
    Eye Windows:
      Uplink  0: ____________________________________________________XXXXXXXX____________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 23
      Window Length: 36
      Eye Window: __XXXX__________________________________
]
09:06:29:setup_element:INFO:	Beginning SMX ASICs map scan
09:06:29:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:06:29:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:06:29:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
09:06:29:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
09:06:29:uplink:INFO:	Setting uplinks mask [0]
09:06:30:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 0
09:06:31:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map:
    ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
  Clock Phase Characteristic:
    Optimal Phase: 15
    Window Length: 72
    Eye Windows:
      Uplink  0: ____________________________________________________XXXXXXXX____________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 23
      Window Length: 36
      Eye Window: __XXXX__________________________________

09:06:31:setup_element:INFO:	Performing Elink synchronization
09:06:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:06:31:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:06:31:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
09:06:31:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
09:06:31:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
09:06:31:uplink:INFO:	Enabling uplinks [0]
09:06:31:ST3_emu:INFO:	Number of chips: 1
09:06:31:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
09:06:32:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
 ============== Starting SMX ID burn ==============
09:06:36:asictest:WARNING:	Fused ID is not zero 6359364699117619046
09:06:36:asictest:INFO:	 Starting ADC calibration/scan 
09:06:42:asictest:INFO:	0,	0,	0.000000
09:06:48:asictest:INFO:	1,	42,	0.300000
09:06:54:asictest:INFO:	2,	83,	0.600000
09:06:59:asictest:INFO:	3,	131,	0.900000
09:07:05:asictest:INFO:	4,	180,	1.200000
09:07:11:asictest:INFO:	5,	197,	1.300000
09:07:16:asictest:INFO:	T [C] Vddm[mV] CSA [mV] AUX [mV]
09:07:17:asictest:INFO:	 23.18 1200.92  843.04    0.00
09:07:18:ST3_smx:INFO:	chip: 0-7 	 23.181864 C 	 1200.917911 mV
09:07:18:ST3_smx:INFO:	# loops 0
09:07:20:ST3_smx:INFO:	# loops 1
09:07:21:ST3_smx:INFO:	# loops 2
09:07:23:ST3_smx:INFO:	# loops 3
09:07:24:ST3_smx:INFO:	# loops 4
09:07:26:ST3_smx:INFO:	Total # of broken channels: 0
09:07:26:ST3_smx:INFO:	List of broken channels: []
09:07:26:ST3_smx:INFO:	Total # of broken channels: 0
09:07:26:ST3_smx:INFO:	List of broken channels: []
09:07:27:asictest:INFO:	 Starting CSA scan -
09:07:28:asictest:INFO:	0,	0.065500
09:07:28:asictest:INFO:	9,	0.144500
09:07:29:asictest:INFO:	18,	0.217400
09:07:30:asictest:INFO:	27,	0.286300
09:07:30:asictest:INFO:	36,	0.352900
09:07:31:asictest:INFO:	45,	0.420500
09:07:32:asictest:INFO:	54,	0.480700
09:07:32:asictest:INFO:	63,	0.530200
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_09_01-09_06_21
OPERATOR  : Olga B.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 0000L000-M000 | side-N | index: (7/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
  HW_ADDR : 0x7 | VERS_NO : 2.2
  ASIC_ID : XA-000-08-002-001-008-118-06 | FUSED_ID : 6359364699117619046
  IC_TEMP :   13.26 | VDDM : 1142.72 | AUX_INT :    0.00 | CsaBias :  156.83
  CONF_FAIL_REG : 0
  CSA_BIAS : 15
  THR2_GLB : 30
  ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
  ADC_Chi2/NDF : 7.96544e-05 / 1
  ADC_P0  : 0.00000e+00 ± 8.92493e-03
  ADC_P1  : 7.57333e-03 ± 1.48647e-04
  ADC_P2  : -5.00869e-06 ± 8.52259e-07
  CSA_Chi2/NDF : 3.39424e-05 / 1
  CSA_P0  : 6.54000e-02 ± 2.19283e-03
  CSA_P1  : 8.87685e-03 ± 1.62602e-04
  CSA_P2  : -2.31188e-05 ± 2.48168e-06
---------------------------------------
N_BROKEN_DISC :  0 | N_BROKEN_FAST :  []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.3459', '1.800', '0.1304', '1.800', '0.1482', '7.000', '0.6887']
VI_after__Init : ['1.200', '0.3466', '1.800', '0.1293', '1.800', '0.1467', '7.000', '0.6890']
VI_at__the_End : ['1.200', '0.5304', '1.800', '0.0727', '1.800', '0.1585', '7.000', '0.6891']
09:07:40:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-001-008-118-06//TestDate_2023_09_01-09_06_21/

          
Comment.txt
J076, UK module