XA-000-08-002-001-008-147-07    12.09.23 13:37:07

ADC4
cADCscan.png
SMX_7
SMX_7.png
CSA
cCSAscan.png
Calibration
ADC
p0.svg
p1.svg
CSA
p0.svg
p2.svg
p1.svg
Report.txt
            13:37:07:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:37:08:ST3_Shared:INFO:	-------------------------Microcable-------------------------
13:37:08:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:37:09:smx_tester:INFO:	Scanning setup
13:37:09:elinks:INFO:	Disabling clock on downlink 0
13:37:09:elinks:INFO:	Disabling clock on downlink 1
13:37:09:elinks:INFO:	Disabling clock on downlink 2
13:37:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:37:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:37:09:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 0
13:37:09:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 3
13:37:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:37:09:elinks:INFO:	Disabling clock on downlink 0
13:37:09:elinks:INFO:	Disabling clock on downlink 1
13:37:09:elinks:INFO:	Disabling clock on downlink 2
13:37:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:37:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:37:10:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:37:10:elinks:INFO:	Disabling clock on downlink 0
13:37:10:elinks:INFO:	Disabling clock on downlink 1
13:37:10:elinks:INFO:	Disabling clock on downlink 2
13:37:10:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:37:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:37:10:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:37:10:setup_element:INFO:	Scanning clock phase
13:37:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:37:10:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:37:10:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
13:37:10:setup_element:INFO:	Eye window for uplink 0 : _____________________________________________________XXXXXX_____________________
Clock Delay: 15
13:37:10:setup_element:INFO:	Eye window for uplink 3 : ________________________________________________________XX______________________
Clock Delay: 16
13:37:10:setup_element:INFO:	Setting the clock phase to 15 for group 0, downlink 0
13:37:10:setup_element:INFO:	Scanning data phases
13:37:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:37:10:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:37:15:setup_element:INFO:	Data phase scan results for group 0, downlink 0
13:37:15:setup_element:INFO:	Eye window for uplink 0 : _XXXXXXXX_______________________________
Data delay found: 24
13:37:15:setup_element:WARNING:	Group 0, downlink 0, uplink 3: No True values in scanned data!
Traceback (most recent call last):
  File "/home/cbm/ST3_BASE/smx_software_ASIC_20MHz/python/hctsp/setup_element.py", line 261, in characterize_data_phases
    data_delay, window_len = find_center(fcl)
  File "/home/cbm/ST3_BASE/smx_software_ASIC_20MHz/python/hctsp/hctsp.py", line 87, in find_center
    raise Exception("No True values in scanned data!")
Exception: No True values in scanned data!

13:37:15:setup_element:INFO:	Setting the data phase to 24 for uplink 0
13:37:15:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0, 3]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 15
    Window Length: 74
    Eye Windows:
      Uplink  0: _____________________________________________________XXXXXX_____________________
      Uplink  3: ________________________________________________________XX______________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 24
      Window Length: 32
      Eye Window: _XXXXXXXX_______________________________
]
13:37:15:setup_element:INFO:	Beginning SMX ASICs map scan
13:37:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:37:15:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:37:15:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
13:37:15:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
13:37:15:uplink:INFO:	Setting uplinks mask [0, 3]
13:37:16:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 0
13:37:18:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0, 3]
  ASICs Map:
    ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
  Clock Phase Characteristic:
    Optimal Phase: 15
    Window Length: 74
    Eye Windows:
      Uplink  0: _____________________________________________________XXXXXX_____________________
      Uplink  3: ________________________________________________________XX______________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 24
      Window Length: 32
      Eye Window: _XXXXXXXX_______________________________

13:37:18:setup_element:INFO:	Performing Elink synchronization
13:37:18:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:37:18:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:37:18:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
13:37:18:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
13:37:18:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
13:37:18:uplink:INFO:	Enabling uplinks [0, 3]
13:37:18:ST3_emu:INFO:	Number of chips: 1
13:37:18:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
13:37:19:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
 ============== Starting SMX ID burn ==============
13:37:22:asictest:WARNING:	Fused ID is not zero 6359364699117619511
13:37:23:asictest:INFO:	 Starting ADC calibration/scan 
13:37:28:asictest:INFO:	0,	0,	0.000000
13:37:34:asictest:INFO:	1,	44,	0.300000
13:37:40:asictest:INFO:	2,	87,	0.600000
13:37:46:asictest:INFO:	3,	134,	0.900000
13:37:51:asictest:INFO:	4,	184,	1.200000
13:37:57:asictest:INFO:	5,	201,	1.300000
13:38:03:asictest:INFO:	T [C] Vddm[mV] CSA [mV] AUX [mV]
13:38:03:asictest:INFO:	 24.51 1195.24  862.55    0.00
13:38:04:ST3_smx:INFO:	chip: 0-7 	 24.509361 C 	 1195.242364 mV
13:38:04:ST3_smx:INFO:	# loops 0
13:38:06:ST3_smx:INFO:	# loops 1
13:38:07:ST3_smx:INFO:	# loops 2
13:38:09:ST3_smx:INFO:	# loops 3
13:38:11:ST3_smx:INFO:	# loops 4
13:38:12:ST3_smx:INFO:	Total # of broken channels: 0
13:38:12:ST3_smx:INFO:	List of broken channels: []
13:38:12:ST3_smx:INFO:	Total # of broken channels: 0
13:38:12:ST3_smx:INFO:	List of broken channels: []
13:38:13:asictest:INFO:	 Starting CSA scan -
13:38:14:asictest:INFO:	0,	0.063100
13:38:15:asictest:INFO:	9,	0.142700
13:38:15:asictest:INFO:	18,	0.216100
13:38:16:asictest:INFO:	27,	0.285700
13:38:17:asictest:INFO:	36,	0.354500
13:38:17:asictest:INFO:	45,	0.424300
13:38:18:asictest:INFO:	54,	0.482700
13:38:19:asictest:INFO:	63,	0.524400
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_09_12-13_37_07
OPERATOR  : Kerstin S.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 0116L019-M000 | side-N | index: (6/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
  HW_ADDR : 0x7 | VERS_NO : 2.2
  ASIC_ID : XA-000-08-002-001-008-147-07 | FUSED_ID : 6359364699117619511
  IC_TEMP :   14.79 | VDDM : 1106.77 | AUX_INT :    0.00 | CsaBias :  135.84
  CONF_FAIL_REG : 0
  CSA_BIAS : 15
  THR2_GLB : 30
  ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
  ADC_Chi2/NDF : 1.94142e-06 / 1
  ADC_P0  : 0.00000e+00 ± 1.39335e-03
  ADC_P1  : 7.22103e-03 ± 2.27400e-05
  ADC_P2  : -3.76858e-06 ± 1.27820e-07
  CSA_Chi2/NDF : 1.22442e-04 / 1
  CSA_P0  : 6.14042e-02 ± 4.16485e-03
  CSA_P1  : 9.21634e-03 ± 3.08832e-04
  CSA_P2  : -2.82407e-05 ± 4.71348e-06
---------------------------------------
N_BROKEN_DISC :  0 | N_BROKEN_FAST :  []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.2239', '1.800', '0.0672', '1.800', '0.1446', '6.999', '0.6903']
VI_after__Init : ['1.200', '0.2244', '1.800', '0.0672', '1.800', '0.1474', '7.000', '0.6910']
VI_at__the_End : ['1.199', '0.5238', '1.800', '0.0691', '1.800', '0.1594', '7.000', '0.6916']
13:38:27:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-001-008-147-07//TestDate_2023_09_12-13_37_07/