
XA-000-08-002-001-008-155-07 11.09.23 12:47:27
ADC4

SMX_7

CSA

Calibration
ADC
CSA
Report.txt
12:47:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:47:27:ST3_Shared:INFO: -------------------------Microcable------------------------- 12:47:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:47:28:smx_tester:INFO: Scanning setup 12:47:28:elinks:INFO: Disabling clock on downlink 0 12:47:28:elinks:INFO: Disabling clock on downlink 1 12:47:28:elinks:INFO: Disabling clock on downlink 2 12:47:28:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:47:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 12:47:28:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0 12:47:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:47:28:elinks:INFO: Disabling clock on downlink 0 12:47:28:elinks:INFO: Disabling clock on downlink 1 12:47:29:elinks:INFO: Disabling clock on downlink 2 12:47:29:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:47:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 12:47:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:47:29:elinks:INFO: Disabling clock on downlink 0 12:47:29:elinks:INFO: Disabling clock on downlink 1 12:47:29:elinks:INFO: Disabling clock on downlink 2 12:47:29:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:47:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:47:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:47:29:setup_element:INFO: Scanning clock phase 12:47:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 12:47:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 12:47:29:setup_element:INFO: Clock phase scan results for group 0, downlink 0 12:47:29:setup_element:INFO: Eye window for uplink 0 : _____________________________________________________XXXXXX_____________________ Clock Delay: 15 12:47:29:setup_element:INFO: Setting the clock phase to 15 for group 0, downlink 0 12:47:29:setup_element:INFO: Scanning data phases 12:47:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 12:47:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 12:47:34:setup_element:INFO: Data phase scan results for group 0, downlink 0 12:47:34:setup_element:INFO: Eye window for uplink 0 : ____XXX_________________________________ Data delay found: 25 12:47:34:setup_element:INFO: Setting the data phase to 25 for uplink 0 12:47:34:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 0 Uplinks: [0] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 15 Window Length: 74 Eye Windows: Uplink 0: _____________________________________________________XXXXXX_____________________ Data phase characteristics: Uplink 0: Optimal Phase: 25 Window Length: 37 Eye Window: ____XXX_________________________________ ] 12:47:34:setup_element:INFO: Beginning SMX ASICs map scan 12:47:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 12:47:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 12:47:34:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 12:47:34:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 12:47:34:uplink:INFO: Setting uplinks mask [0] 12:47:35:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0 12:47:36:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 0 Uplinks: [0] ASICs Map: ASIC address 0x7: (ASIC uplink, uplink): (0, 0) Clock Phase Characteristic: Optimal Phase: 15 Window Length: 74 Eye Windows: Uplink 0: _____________________________________________________XXXXXX_____________________ Data phase characteristics: Uplink 0: Optimal Phase: 25 Window Length: 37 Eye Window: ____XXX_________________________________ 12:47:36:setup_element:INFO: Performing Elink synchronization 12:47:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 12:47:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 12:47:36:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 12:47:36:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 12:47:36:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0 12:47:36:uplink:INFO: Enabling uplinks [0] 12:47:37:ST3_emu:INFO: Number of chips: 1 12:47:37:ST3_emu:INFO: Chip address: 0x7 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7 12:47:38:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values ============== Starting SMX ID burn ============== 12:47:41:asictest:WARNING: Fused ID is not zero 6359364699117619639 12:47:42:asictest:INFO: Starting ADC calibration/scan 12:47:47:asictest:INFO: 0, 0, 0.000000 12:47:53:asictest:INFO: 1, 42, 0.300000 12:47:59:asictest:INFO: 2, 84, 0.600000 12:48:05:asictest:INFO: 3, 130, 0.900000 12:48:10:asictest:INFO: 4, 178, 1.200000 12:48:16:asictest:INFO: 5, 193, 1.300000 12:48:22:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV] 12:48:22:asictest:INFO: 24.78 1192.33 777.83 0.00 12:48:23:ST3_smx:INFO: chip: 0-7 24.783973 C 1192.326639 mV 12:48:23:ST3_smx:INFO: # loops 0 12:48:25:ST3_smx:INFO: # loops 1 12:48:27:ST3_smx:INFO: # loops 2 12:48:28:ST3_smx:INFO: # loops 3 12:48:30:ST3_smx:INFO: # loops 4 12:48:32:ST3_smx:INFO: Total # of broken channels: 0 12:48:32:ST3_smx:INFO: List of broken channels: [] 12:48:32:ST3_smx:INFO: Total # of broken channels: 0 12:48:32:ST3_smx:INFO: List of broken channels: [] 12:48:33:asictest:INFO: Starting CSA scan - 12:48:33:asictest:INFO: 0, 0.066900 12:48:34:asictest:INFO: 9, 0.151100 12:48:35:asictest:INFO: 18, 0.226900 12:48:35:asictest:INFO: 27, 0.302700 12:48:36:asictest:INFO: 36, 0.372100 12:48:36:asictest:INFO: 45, 0.435600 12:48:37:asictest:INFO: 54, 0.487000 12:48:38:asictest:INFO: 63, 0.517700 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : Microcable TEST_DATE : 2023_09_11-12_47_27 OPERATOR : Oleksandr S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : 0116L019-M000 | side-P | index: (6/8) --------------------------------------- --------------------------------------- ASIC_CONFIG_PARAMETERS HW_ADDR : 0x7 | VERS_NO : 2.2 ASIC_ID : XA-000-08-002-001-008-155-07 | FUSED_ID : 6359364699117619639 IC_TEMP : 18.06 | VDDM : 1093.11 | AUX_INT : 0.00 | CsaBias : 95.66 CONF_FAIL_REG : 0 CSA_BIAS : 15 THR2_GLB : 30 ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122 ADC_Chi2/NDF : 5.43582e-05 / 1 ADC_P0 : 0.00000e+00 ± 7.37280e-03 ADC_P1 : 7.40527e-03 ± 1.25919e-04 ADC_P2 : -3.58345e-06 ± 7.34939e-07 CSA_Chi2/NDF : 1.65603e-04 / 1 CSA_P0 : 6.32583e-02 ± 4.84359e-03 CSA_P1 : 1.02378e-02 ± 3.59161e-04 CSA_P2 : -4.63845e-05 ± 5.48162e-06 --------------------------------------- N_BROKEN_DISC : 0 | N_BROKEN_FAST : [] N_BROKEN_CABLE : 0 LIST_OF_BROKEN_CABLES : [] --------------------------------------- VI_before_Init : ['1.198', '0.3289', '1.800', '0.0765', '1.800', '0.1625', '7.000', '0.6867'] VI_after__Init : ['1.200', '0.3395', '1.800', '0.0752', '1.800', '0.1622', '7.000', '0.6877'] VI_at__the_End : ['1.200', '0.5177', '1.800', '0.0721', '1.800', '0.1751', '7.000', '0.6879'] 12:48:50:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-001-008-155-07//TestDate_2023_09_11-12_47_27/