
XA-000-08-002-001-008-164-14 21.09.23 08:44:39
ADC4

SMX_7

CSA

Calibration
ADC
CSA
Report.txt
08:44:39:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:44:39:ST3_Shared:INFO: -------------------------Microcable------------------------- 08:44:39:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:44:41:smx_tester:INFO: Scanning setup 08:44:41:elinks:INFO: Disabling clock on downlink 0 08:44:41:elinks:INFO: Disabling clock on downlink 1 08:44:41:elinks:INFO: Disabling clock on downlink 2 08:44:41:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:44:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 08:44:41:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0 08:44:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:44:41:elinks:INFO: Disabling clock on downlink 0 08:44:41:elinks:INFO: Disabling clock on downlink 1 08:44:41:elinks:INFO: Disabling clock on downlink 2 08:44:41:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:44:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:44:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:44:41:elinks:INFO: Disabling clock on downlink 0 08:44:41:elinks:INFO: Disabling clock on downlink 1 08:44:41:elinks:INFO: Disabling clock on downlink 2 08:44:41:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:44:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 08:44:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:44:41:setup_element:INFO: Scanning clock phase 08:44:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 08:44:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 08:44:42:setup_element:INFO: Clock phase scan results for group 0, downlink 0 08:44:42:setup_element:INFO: Eye window for uplink 0 : ______________________________________________________XXXXXXX___________________ Clock Delay: 17 08:44:42:setup_element:INFO: Setting the clock phase to 17 for group 0, downlink 0 08:44:42:setup_element:INFO: Scanning data phases 08:44:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 08:44:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 08:44:47:setup_element:INFO: Data phase scan results for group 0, downlink 0 08:44:47:setup_element:INFO: Eye window for uplink 0 : __XXXXX_________________________________ Data delay found: 24 08:44:47:setup_element:INFO: Setting the data phase to 24 for uplink 0 08:44:47:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 0 Uplinks: [0] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 17 Window Length: 73 Eye Windows: Uplink 0: ______________________________________________________XXXXXXX___________________ Data phase characteristics: Uplink 0: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ ] 08:44:47:setup_element:INFO: Beginning SMX ASICs map scan 08:44:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 08:44:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 08:44:47:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 08:44:47:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 08:44:47:uplink:INFO: Setting uplinks mask [0] 08:44:48:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0 08:44:49:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 0 Uplinks: [0] ASICs Map: ASIC address 0x7: (ASIC uplink, uplink): (0, 0) Clock Phase Characteristic: Optimal Phase: 17 Window Length: 73 Eye Windows: Uplink 0: ______________________________________________________XXXXXXX___________________ Data phase characteristics: Uplink 0: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ 08:44:49:setup_element:INFO: Performing Elink synchronization 08:44:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 08:44:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 08:44:49:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 08:44:49:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 08:44:49:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0 08:44:49:uplink:INFO: Enabling uplinks [0] 08:44:49:ST3_emu:INFO: Number of chips: 1 08:44:49:ST3_emu:INFO: Chip address: 0x7 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7 08:44:50:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values ============== Starting SMX ID burn ============== 08:44:54:asictest:WARNING: Fused ID is not zero 6359364699117619790 08:44:54:asictest:INFO: Starting ADC calibration/scan 08:45:00:asictest:INFO: 0, 0, 0.000000 08:45:06:asictest:INFO: 1, 42, 0.300000 08:45:12:asictest:INFO: 2, 85, 0.600000 08:45:17:asictest:INFO: 3, 133, 0.900000 08:45:23:asictest:INFO: 4, 183, 1.200000 08:45:29:asictest:INFO: 5, 200, 1.300000 08:45:34:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV] 08:45:35:asictest:INFO: 26.03 1201.62 891.27 0.00 08:45:36:ST3_smx:INFO: chip: 0-7 26.025759 C 1201.616858 mV 08:45:36:ST3_smx:INFO: # loops 0 08:45:38:ST3_smx:INFO: # loops 1 08:45:39:ST3_smx:INFO: # loops 2 08:45:41:ST3_smx:INFO: # loops 3 08:45:42:ST3_smx:INFO: # loops 4 08:45:44:ST3_smx:INFO: Total # of broken channels: 0 08:45:44:ST3_smx:INFO: List of broken channels: [] 08:45:44:ST3_smx:INFO: Total # of broken channels: 0 08:45:44:ST3_smx:INFO: List of broken channels: [] 08:45:45:asictest:INFO: Starting CSA scan - 08:45:46:asictest:INFO: 0, 0.064000 08:45:46:asictest:INFO: 9, 0.142600 08:45:47:asictest:INFO: 18, 0.214900 08:45:48:asictest:INFO: 27, 0.282100 08:45:48:asictest:INFO: 36, 0.345600 08:45:49:asictest:INFO: 45, 0.410900 08:45:50:asictest:INFO: 54, 0.476800 08:45:50:asictest:INFO: 63, 0.525200 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : Microcable TEST_DATE : 2023_09_21-08_44_39 OPERATOR : Olga B.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : 0329L020-M004 | side-P | index: (5/8) | Spare --------------------------------------- --------------------------------------- ASIC_CONFIG_PARAMETERS HW_ADDR : 0x7 | VERS_NO : 2.2 ASIC_ID : XA-000-08-002-001-008-164-14 | FUSED_ID : 6359364699117619790 IC_TEMP : 16.24 | VDDM : 1132.19 | AUX_INT : 0.00 | CsaBias : 175.01 CONF_FAIL_REG : 0 CSA_BIAS : 15 THR2_GLB : 30 ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122 ADC_Chi2/NDF : 3.60149e-05 / 1 ADC_P0 : 0.00000e+00 ± 6.00124e-03 ADC_P1 : 7.40150e-03 ± 9.83841e-05 ADC_P2 : -4.56439e-06 ± 5.55505e-07 CSA_Chi2/NDF : 5.41905e-05 / 1 CSA_P0 : 6.51375e-02 ± 2.77074e-03 CSA_P1 : 8.60218e-03 ± 2.05455e-04 CSA_P2 : -1.99956e-05 ± 3.13572e-06 --------------------------------------- N_BROKEN_DISC : 0 | N_BROKEN_FAST : [] N_BROKEN_CABLE : 0 LIST_OF_BROKEN_CABLES : [] --------------------------------------- VI_before_Init : ['1.199', '0.3049', '1.800', '0.0908', '1.800', '0.1544', '7.000', '0.6885'] VI_after__Init : ['1.200', '0.3062', '1.800', '0.0901', '1.800', '0.1510', '7.000', '0.6897'] VI_at__the_End : ['1.200', '0.5260', '1.800', '0.0726', '1.800', '0.1637', '7.000', '0.6898'] 08:45:54:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-001-008-164-14//TestDate_2023_09_21-08_44_39/