XA-000-08-002-002-007-015-15 18.09.23 09:27:30
ADC4
SMX_7
CSA
Calibration
ADC
CSA
Info
09:27:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:27:30:ST3_Shared:INFO: -------------------------Microcable-------------------------
09:27:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:27:32:smx_tester:INFO: Scanning setup
09:27:32:elinks:INFO: Disabling clock on downlink 0
09:27:32:elinks:INFO: Disabling clock on downlink 1
09:27:32:elinks:INFO: Disabling clock on downlink 2
09:27:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:27:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:27:32:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
09:27:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:27:32:elinks:INFO: Disabling clock on downlink 0
09:27:32:elinks:INFO: Disabling clock on downlink 1
09:27:32:elinks:INFO: Disabling clock on downlink 2
09:27:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:27:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:27:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:27:32:elinks:INFO: Disabling clock on downlink 0
09:27:32:elinks:INFO: Disabling clock on downlink 1
09:27:32:elinks:INFO: Disabling clock on downlink 2
09:27:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:27:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:27:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:27:32:setup_element:INFO: Scanning clock phase
09:27:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:27:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:27:32:setup_element:INFO: Clock phase scan results for group 0, downlink 0
09:27:32:setup_element:INFO: Eye window for uplink 0 : ____________________________________________________XXXXXXX_____________________
Clock Delay: 15
09:27:32:setup_element:INFO: Setting the clock phase to 15 for group 0, downlink 0
09:27:32:setup_element:INFO: Scanning data phases
09:27:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:27:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:27:37:setup_element:INFO: Data phase scan results for group 0, downlink 0
09:27:37:setup_element:INFO: Eye window for uplink 0 : ___XXX__________________________________
Data delay found: 24
09:27:37:setup_element:INFO: Setting the data phase to 24 for uplink 0
09:27:37:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 15
Window Length: 73
Eye Windows:
Uplink 0: ____________________________________________________XXXXXXX_____________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 24
Window Length: 37
Eye Window: ___XXX__________________________________
]
09:27:37:setup_element:INFO: Beginning SMX ASICs map scan
09:27:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:27:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:27:37:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
09:27:37:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
09:27:37:uplink:INFO: Setting uplinks mask [0]
09:27:38:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0
09:27:40:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map:
ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
Clock Phase Characteristic:
Optimal Phase: 15
Window Length: 73
Eye Windows:
Uplink 0: ____________________________________________________XXXXXXX_____________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 24
Window Length: 37
Eye Window: ___XXX__________________________________
09:27:40:setup_element:INFO: Performing Elink synchronization
09:27:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:27:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:27:40:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
09:27:40:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
09:27:40:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
09:27:40:uplink:INFO: Enabling uplinks [0]
09:27:40:ST3_emu:INFO: Number of chips: 1
09:27:40:ST3_emu:INFO: Chip address: 0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
09:27:41:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
============== Starting SMX ID burn ==============
09:27:45:asictest:WARNING: Fused ID is not zero 6359364699118661887
09:27:45:asictest:INFO: Starting ADC calibration/scan
09:27:51:asictest:INFO: 0, 0, 0.000000
09:27:57:asictest:INFO: 1, 41, 0.300000
09:28:02:asictest:INFO: 2, 80, 0.600000
09:28:08:asictest:INFO: 3, 125, 0.900000
09:28:14:asictest:INFO: 4, 172, 1.200000
09:28:20:asictest:INFO: 5, 188, 1.300000
09:28:25:asictest:INFO: T [C] Vddm[mV] CSA [mV] AUX [mV]
09:28:26:asictest:INFO: 20.29 1201.53 735.42 0.00
09:28:27:ST3_smx:INFO: chip: 0-7 20.287977 C 1201.528451 mV
09:28:27:ST3_smx:INFO: # loops 0
09:28:29:ST3_smx:INFO: # loops 1
09:28:30:ST3_smx:INFO: # loops 2
09:28:32:ST3_smx:INFO: # loops 3
09:28:34:ST3_smx:INFO: # loops 4
09:28:36:ST3_smx:INFO: Total # of broken channels: 0
09:28:36:ST3_smx:INFO: List of broken channels: []
09:28:36:ST3_smx:INFO: Total # of broken channels: 0
09:28:36:ST3_smx:INFO: List of broken channels: []
09:28:37:asictest:INFO: Starting CSA scan -
09:28:38:asictest:INFO: 0, 0.065200
09:28:38:asictest:INFO: 9, 0.149200
09:28:39:asictest:INFO: 18, 0.227400
09:28:39:asictest:INFO: 27, 0.304500
09:28:40:asictest:INFO: 36, 0.376300
09:28:41:asictest:INFO: 45, 0.443800
09:28:42:asictest:INFO: 54, 0.501900
09:28:43:asictest:INFO: 63, 0.541900
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_09_18-09_27_30
OPERATOR : Olga B.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID : 0798L018-M002 | side-P | index: (7/8) | Spare
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
HW_ADDR : 0x7 | VERS_NO : 2.2
ASIC_ID : XA-000-08-002-002-007-015-15 | FUSED_ID : 6359364699118661887
IC_TEMP : 13.36 | VDDM : 1127.53 | AUX_INT : 0.00 | CsaBias : 116.84
CONF_FAIL_REG : 0
CSA_BIAS : 15
THR2_GLB : 30
ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
ADC_Chi2/NDF : 2.95553e-05 / 1
ADC_P0 : 0.00000e+00 ± 5.43648e-03
ADC_P1 : 7.86609e-03 ± 9.47996e-05
ADC_P2 : -5.11893e-06 ± 5.69487e-07
CSA_Chi2/NDF : 1.10820e-04 / 1
CSA_P0 : 6.21833e-02 ± 3.96225e-03
CSA_P1 : 1.00929e-02 ± 2.93808e-04
CSA_P2 : -3.79777e-05 ± 4.48418e-06
---------------------------------------
N_BROKEN_DISC : 0 | N_BROKEN_FAST : []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.3621', '1.800', '0.0988', '1.800', '0.1560', '7.000', '0.6884']
VI_after__Init : ['1.200', '0.3594', '1.800', '0.0981', '1.800', '0.1560', '7.000', '0.6897']
VI_at__the_End : ['1.200', '0.5418', '1.800', '0.0746', '1.800', '0.1676', '7.000', '0.6897']
09:28:48:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-002-007-015-15//TestDate_2023_09_18-09_27_30/