XA-000-08-002-002-007-137-05    09.11.23 10:32:49

ADC4
cADCscan.png
SMX_7
SMX_7.png
CSA
cCSAscan.png
Report.txt
            10:32:49:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:32:49:ST3_Shared:INFO:	-------------------------Microcable-------------------------
10:32:49:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:32:51:smx_tester:INFO:	Scanning setup
10:32:51:elinks:INFO:	Disabling clock on downlink 0
10:32:51:elinks:INFO:	Disabling clock on downlink 1
10:32:51:elinks:INFO:	Disabling clock on downlink 2
10:32:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:32:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:32:51:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 0
10:32:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:32:51:elinks:INFO:	Disabling clock on downlink 0
10:32:51:elinks:INFO:	Disabling clock on downlink 1
10:32:51:elinks:INFO:	Disabling clock on downlink 2
10:32:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:32:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:32:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:32:51:elinks:INFO:	Disabling clock on downlink 0
10:32:51:elinks:INFO:	Disabling clock on downlink 1
10:32:51:elinks:INFO:	Disabling clock on downlink 2
10:32:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:32:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:32:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:32:51:setup_element:INFO:	Scanning clock phase
10:32:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:32:52:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
10:32:52:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
10:32:52:setup_element:INFO:	Eye window for uplink 0 : _____________________________________________________XXXXXX_____________________
Clock Delay: 15
10:32:52:setup_element:INFO:	Setting the clock phase to 15 for group 0, downlink 0
10:32:52:setup_element:INFO:	Scanning data phases
10:32:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:32:52:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
10:32:57:setup_element:INFO:	Data phase scan results for group 0, downlink 0
10:32:57:setup_element:INFO:	Eye window for uplink 0 : _____XXXX_______________________________
Data delay found: 26
10:32:57:setup_element:INFO:	Setting the data phase to 26 for uplink 0
10:32:57:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 15
    Window Length: 74
    Eye Windows:
      Uplink  0: _____________________________________________________XXXXXX_____________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 26
      Window Length: 36
      Eye Window: _____XXXX_______________________________
]
10:32:57:setup_element:INFO:	Beginning SMX ASICs map scan
10:32:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:32:57:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
10:32:57:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
10:32:57:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
10:32:57:uplink:INFO:	Setting uplinks mask [0]
10:32:58:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 0
10:32:59:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0]
  ASICs Map:
    ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
  Clock Phase Characteristic:
    Optimal Phase: 15
    Window Length: 74
    Eye Windows:
      Uplink  0: _____________________________________________________XXXXXX_____________________
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 26
      Window Length: 36
      Eye Window: _____XXXX_______________________________

10:32:59:setup_element:INFO:	Performing Elink synchronization
10:32:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:32:59:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
10:32:59:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
10:32:59:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
10:32:59:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
10:32:59:uplink:INFO:	Enabling uplinks [0]
10:32:59:ST3_emu:INFO:	Number of chips: 1
10:32:59:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
10:33:00:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
 ============== Starting SMX ID burn ==============
10:33:04:asictest:INFO:	 last smx id for ser=8 is: 6359364699118663829
10:33:04:asictest:INFO:	0101100001000001000000001000000000100000001000000111100010010101
10:33:05:asictest:INFO:	Fsourse & program 0V
10:33:05:asictest:INFO:	S
10:33:06:asictest:INFO:	EFUSE_CTL 01 000 000
10:33:06:asictest:INFO:	EFUSE_CTL 00 000 000
10:33:06:asictest:INFO:	Fsource 3.3V ON
10:33:06:asictest:INFO:	F
10:33:09:asictest:INFO:	Fsource 3.3V OFF
10:33:09:asictest:INFO:	S
10:33:09:asictest:INFO:	EFUSE_CTL 01 000 000
10:33:10:asictest:INFO:	 Starting ADC calibration/scan 
10:33:15:asictest:INFO:	0,	51,	0.000000
10:33:21:asictest:INFO:	1,	57,	0.300000
10:33:27:asictest:INFO:	2,	80,	0.600000
10:33:33:asictest:INFO:	3,	125,	0.900000
10:33:38:asictest:INFO:	4,	173,	1.200000
10:33:44:asictest:INFO:	5,	194,	1.300000
10:33:50:asictest:INFO:	T [C] Vddm[mV] CSA [mV] AUX [mV]
10:33:50:asictest:INFO:	 18.00 1190.37  844.11  349.65
10:33:51:ST3_smx:INFO:	chip: 0-7 	 18.002895 C 	 1190.366727 mV
10:33:51:ST3_smx:INFO:	# loops 0
10:33:53:ST3_smx:INFO:	# loops 1
10:33:54:ST3_smx:INFO:	# loops 2
10:33:56:ST3_smx:INFO:	# loops 3
10:33:57:ST3_smx:INFO:	# loops 4
10:33:59:ST3_smx:INFO:	Total # of broken channels: 0
10:33:59:ST3_smx:INFO:	List of broken channels: []
10:33:59:ST3_smx:INFO:	Total # of broken channels: 0
10:33:59:ST3_smx:INFO:	List of broken channels: []
10:34:00:asictest:INFO:	 Starting CSA scan -
10:34:01:asictest:INFO:	0,	0.064600
10:34:02:asictest:INFO:	9,	0.147300
10:34:02:asictest:INFO:	18,	0.222400
10:34:03:asictest:INFO:	27,	0.293000
10:34:04:asictest:INFO:	36,	0.362700
10:34:04:asictest:INFO:	45,	0.430700
10:34:05:asictest:INFO:	54,	0.488000
10:34:06:asictest:INFO:	63,	0.530300
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2023_11_09-10_32_49
OPERATOR  : Robert V.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 0000L000-M000 | index: (1/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
  HW_ADDR : 0x7 | VERS_NO : 2.2
  ASIC_ID : XA-000-08-002-002-007-137-05 | FUSED_ID : 6359364699118663829
  IC_TEMP :   11.20 | VDDM : 1115.37 | AUX_INT :   48.25 | CsaBias :  213.17
  CONF_FAIL_REG : 0
  CSA_BIAS : 15
  THR2_GLB : 30
  ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
  ADC_Chi2/NDF : 1.43577e-04 / 1
  ADC_P0  : 0.00000e+00 ± 1.19824e-02
  ADC_P1  : 8.08277e-03 ± 1.99566e-04
  ADC_P2  : -6.94821e-06 ± 1.17207e-06
  CSA_Chi2/NDF : 8.56262e-05 / 1
  CSA_P0  : 6.33667e-02 ± 3.48287e-03
  CSA_P1  : 9.51283e-03 ± 2.58261e-04
  CSA_P2  : -3.22016e-05 ± 3.94166e-06
---------------------------------------
N_BROKEN_DISC :  0 | N_BROKEN_FAST :  []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.199', '0.2987', '1.800', '0.0690', '1.801', '0.1004', '7.000', '0.6832']
VI_after__Init : ['1.200', '0.3000', '1.800', '0.0694', '1.800', '0.1514', '7.000', '0.6873']
VI_at__the_End : ['1.200', '0.5299', '1.800', '0.0747', '1.800', '0.1736', '7.000', '0.6878']
10:35:14:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-002-007-137-05//TestDate_2023_11_09-10_32_49/

          
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