XA-000-08-002-002-008-040-05 02.02.24 12:49:21
ADC4
SMX_7
CSA
Calibration
ADC
CSA
Info
12:49:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:49:21:ST3_Shared:INFO: -------------------------Microcable-------------------------
12:49:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:49:22:smx_tester:INFO: Scanning setup
12:49:22:elinks:INFO: Disabling clock on downlink 0
12:49:22:elinks:INFO: Disabling clock on downlink 1
12:49:22:elinks:INFO: Disabling clock on downlink 2
12:49:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:49:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:49:23:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
12:49:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:49:23:elinks:INFO: Disabling clock on downlink 0
12:49:23:elinks:INFO: Disabling clock on downlink 1
12:49:23:elinks:INFO: Disabling clock on downlink 2
12:49:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:49:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:49:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:49:23:elinks:INFO: Disabling clock on downlink 0
12:49:23:elinks:INFO: Disabling clock on downlink 1
12:49:23:elinks:INFO: Disabling clock on downlink 2
12:49:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:49:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:49:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:49:23:setup_element:INFO: Scanning clock phase
12:49:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:49:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:49:23:setup_element:INFO: Clock phase scan results for group 0, downlink 0
12:49:23:setup_element:INFO: Eye window for uplink 0 : _____________________________________________________XXXXXX_____________________
Clock Delay: 15
12:49:23:setup_element:INFO: Setting the clock phase to 15 for group 0, downlink 0
12:49:23:setup_element:INFO: Scanning data phases
12:49:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:49:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:49:28:setup_element:INFO: Data phase scan results for group 0, downlink 0
12:49:28:setup_element:INFO: Eye window for uplink 0 : _____XXXX_______________________________
Data delay found: 26
12:49:28:setup_element:INFO: Setting the data phase to 26 for uplink 0
12:49:28:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 15
Window Length: 74
Eye Windows:
Uplink 0: _____________________________________________________XXXXXX_____________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 26
Window Length: 36
Eye Window: _____XXXX_______________________________
]
12:49:28:setup_element:INFO: Beginning SMX ASICs map scan
12:49:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:49:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:49:28:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
12:49:28:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
12:49:28:uplink:INFO: Setting uplinks mask [0]
12:49:29:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 0
12:49:31:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0]
ASICs Map:
ASIC address 0x7: (ASIC uplink, uplink): (0, 0)
Clock Phase Characteristic:
Optimal Phase: 15
Window Length: 74
Eye Windows:
Uplink 0: _____________________________________________________XXXXXX_____________________
Data phase characteristics:
Uplink 0:
Optimal Phase: 26
Window Length: 36
Eye Window: _____XXXX_______________________________
12:49:31:setup_element:INFO: Performing Elink synchronization
12:49:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:49:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:49:31:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
12:49:31:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
12:49:31:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
12:49:31:uplink:INFO: Enabling uplinks [0]
12:49:31:ST3_emu:INFO: Number of chips: 1
addr | upli | dwnli | grp | uplinks | uplinks_map
7 | [0] | 0 | 0 | [0] | [(0, 0)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_0 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
12:49:32:ST3_smx:INFO: Configuring SMX
============== Starting SMX ID burn ==============
12:49:35:asictest:WARNING: Fused ID is not zero 6359364699118666373
============== Starting ADC calibration ==============
12:49:42:asictest:INFO: 0, 7, 0.000000
12:49:47:asictest:INFO: 1, 46, 0.300000
12:49:53:asictest:INFO: 2, 84, 0.600000
12:49:59:asictest:INFO: 3, 130, 0.900000
12:50:05:asictest:INFO: 4, 178, 1.200000
12:50:11:asictest:INFO: 5, 196, 1.300000
12:50:17:ST3_smx:INFO: chip: 0-7 30.237642 C 1196.687776 mV
12:50:17:ST3_smx:INFO: Electrons
12:50:17:ST3_smx:INFO: # loops 0
12:50:19:ST3_smx:INFO: # loops 1
12:50:21:ST3_smx:INFO: # loops 2
12:50:23:ST3_smx:INFO: # loops 3
12:50:24:ST3_smx:INFO: # loops 4
12:50:26:ST3_smx:INFO: Total # of broken channels: 0
12:50:26:ST3_smx:INFO: List of broken channels: []
12:50:26:ST3_smx:INFO: Total # of broken channels: 0
12:50:26:ST3_smx:INFO: List of broken channels: []
12:50:27:asictest:INFO: Starting CSA scan -
0 0.0275
12:50:28:asictest:INFO: 0, 0.027500
9 0.1142
12:50:28:asictest:INFO: 9, 0.114200
18 0.1959
12:50:29:asictest:INFO: 18, 0.195900
27 0.2775
12:50:30:asictest:INFO: 27, 0.277500
36 0.3517
12:50:31:asictest:INFO: 36, 0.351700
45 0.4172
12:50:31:asictest:INFO: 45, 0.417200
54 0.4601
12:50:32:asictest:INFO: 54, 0.460100
63 0.4832
12:50:33:asictest:INFO: 63, 0.483200
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : Microcable
TEST_DATE : 2024_02_02-12_49_21
OPERATOR : Robert V.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID : 0197L014-M000 | side-N | index: (3/8)
---------------------------------------
---------------------------------------
ASIC_CONFIG_PARAMETERS
HW_ADDR : 0x7 | VERS_NO : 2.2
ASIC_ID : XA-000-08-002-002-008-040-05 | FUSED_ID : 6359364699118666373
IC_TEMP : 23.55 | VDDM : 996.00 | AUX_INT : 0.00 | CsaBias : 96.89
CONF_FAIL_REG : 0
CSA_BIAS : 15
THR2_GLB : 30
ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
ADC_Chi2/NDF : 1.79994e-05 / 1
ADC_P0 : 0.00000e+00 ± 4.24257e-03
ADC_P1 : 7.51065e-03 ± 7.08851e-05
ADC_P2 : -4.42517e-06 ± 4.09736e-07
CSA_Chi2/NDF : 3.82498e-04 / 1
CSA_P0 : 2.03458e-02 ± 7.36120e-03
CSA_P1 : 1.13543e-02 ± 5.45846e-04
CSA_P2 : -6.14418e-05 ± 8.33086e-06
---------------------------------------
N_BROKEN_DISC : 0 | N_BROKEN_FAST : []
N_BROKEN_CABLE : 0
LIST_OF_BROKEN_CABLES : []
---------------------------------------
VI_before_Init : ['1.198', '0.3198', '1.800', '0.0881', '1.801', '0.0903', '7.000', '0.6861']
VI_after__Init : ['1.200', '0.3435', '1.800', '0.0875', '1.800', '0.1379', '7.000', '0.6896']
VI_at__the_End : ['1.200', '0.4840', '1.800', '0.0733', '1.800', '0.1561', '7.000', '0.6894']
12:50:44:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir/Microcable/XA-000-08-002-002-008-040-05//TestDate_2024_02_02-12_49_21/