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FEB_1022 23.11.23 11:05:16
Info
11:05:16:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:05:16:ST3_Shared:INFO: --------------------------FEB-ASIC--------------------------
11:05:16:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:05:17:febtest:INFO: Tsting FEB with SN 2035
11:05:18:smx_tester:INFO: Scanning setup
11:05:18:elinks:INFO: Disabling clock on downlink 0
11:05:18:elinks:INFO: Disabling clock on downlink 1
11:05:18:elinks:INFO: Disabling clock on downlink 2
11:05:18:elinks:INFO: Disabling clock on downlink 3
11:05:18:elinks:INFO: Disabling clock on downlink 4
11:05:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:05:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:05:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:05:18:elinks:INFO: Disabling clock on downlink 0
11:05:18:elinks:INFO: Disabling clock on downlink 1
11:05:18:elinks:INFO: Disabling clock on downlink 2
11:05:18:elinks:INFO: Disabling clock on downlink 3
11:05:18:elinks:INFO: Disabling clock on downlink 4
11:05:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:05:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:05:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:05:18:elinks:INFO: Disabling clock on downlink 0
11:05:18:elinks:INFO: Disabling clock on downlink 1
11:05:18:elinks:INFO: Disabling clock on downlink 2
11:05:18:elinks:INFO: Disabling clock on downlink 3
11:05:18:elinks:INFO: Disabling clock on downlink 4
11:05:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:05:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:05:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:05:19:elinks:INFO: Disabling clock on downlink 0
11:05:19:elinks:INFO: Disabling clock on downlink 1
11:05:19:elinks:INFO: Disabling clock on downlink 2
11:05:19:elinks:INFO: Disabling clock on downlink 3
11:05:19:elinks:INFO: Disabling clock on downlink 4
11:05:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:05:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:05:19:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 16
11:05:19:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 17
11:05:19:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 18
11:05:19:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 19
11:05:19:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 20
11:05:19:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 21
11:05:19:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 22
11:05:19:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 23
11:05:19:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 24
11:05:19:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 25
11:05:19:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 26
11:05:19:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 27
11:05:19:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 28
11:05:19:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 29
11:05:19:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 30
11:05:19:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 31
11:05:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:05:19:elinks:INFO: Disabling clock on downlink 0
11:05:19:elinks:INFO: Disabling clock on downlink 1
11:05:19:elinks:INFO: Disabling clock on downlink 2
11:05:19:elinks:INFO: Disabling clock on downlink 3
11:05:19:elinks:INFO: Disabling clock on downlink 4
11:05:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:05:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:05:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:05:19:setup_element:INFO: Scanning clock phase
11:05:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:05:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
11:05:19:setup_element:INFO: Clock phase scan results for group 0, downlink 3
11:05:19:setup_element:INFO: Eye window for uplink 16: __________________________________________________________________________XXXXX_
Clock Delay: 36
11:05:19:setup_element:INFO: Eye window for uplink 17: __________________________________________________________________________XXXXX_
Clock Delay: 36
11:05:19:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:05:19:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:05:19:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:05:19:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:05:19:setup_element:INFO: Eye window for uplink 22: _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:05:19:setup_element:INFO: Eye window for uplink 23: _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:05:19:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:05:19:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:05:19:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:05:19:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:05:19:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:05:19:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:05:19:setup_element:INFO: Eye window for uplink 30: __________________________________________________________________________XXXX__
Clock Delay: 35
11:05:19:setup_element:INFO: Eye window for uplink 31: __________________________________________________________________________XXXX__
Clock Delay: 35
11:05:19:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 3
11:05:19:setup_element:INFO: Scanning data phases
11:05:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:05:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
11:05:24:setup_element:INFO: Data phase scan results for group 0, downlink 3
11:05:24:setup_element:INFO: Eye window for uplink 16: ____________XXXXXX______________________
Data delay found: 34
11:05:24:setup_element:INFO: Eye window for uplink 17: ________XXXXX___________________________
Data delay found: 30
11:05:24:setup_element:INFO: Eye window for uplink 18: ________XXXXX___________________________
Data delay found: 30
11:05:24:setup_element:INFO: Eye window for uplink 19: _____XXXXX______________________________
Data delay found: 27
11:05:24:setup_element:INFO: Eye window for uplink 20: __XXXXX_________________________________
Data delay found: 24
11:05:24:setup_element:INFO: Eye window for uplink 21: XXXXX__________________________________X
Data delay found: 21
11:05:24:setup_element:INFO: Eye window for uplink 22: ___XXXX_________________________________
Data delay found: 24
11:05:24:setup_element:INFO: Eye window for uplink 23: XXX__________________________________XXX
Data delay found: 19
11:05:24:setup_element:INFO: Eye window for uplink 24: ______________________________XXXXX_____
Data delay found: 12
11:05:24:setup_element:INFO: Eye window for uplink 25: __________________________________XXXXX_
Data delay found: 16
11:05:24:setup_element:INFO: Eye window for uplink 26: ____________________________XXXXX_______
Data delay found: 10
11:05:24:setup_element:INFO: Eye window for uplink 27: _________________________________XXXXXX_
Data delay found: 15
11:05:24:setup_element:INFO: Eye window for uplink 28: ________________________________XXXXX___
Data delay found: 14
11:05:24:setup_element:INFO: Eye window for uplink 29: X__________________________________XXXXX
Data delay found: 17
11:05:24:setup_element:INFO: Eye window for uplink 30: ________________________________XXXXXXX_
Data delay found: 15
11:05:24:setup_element:INFO: Eye window for uplink 31: _________________________________XXXX___
Data delay found: 14
11:05:24:setup_element:INFO: Setting the data phase to 34 for uplink 16
11:05:24:setup_element:INFO: Setting the data phase to 30 for uplink 17
11:05:24:setup_element:INFO: Setting the data phase to 30 for uplink 18
11:05:24:setup_element:INFO: Setting the data phase to 27 for uplink 19
11:05:24:setup_element:INFO: Setting the data phase to 24 for uplink 20
11:05:24:setup_element:INFO: Setting the data phase to 21 for uplink 21
11:05:24:setup_element:INFO: Setting the data phase to 24 for uplink 22
11:05:24:setup_element:INFO: Setting the data phase to 19 for uplink 23
11:05:24:setup_element:INFO: Setting the data phase to 12 for uplink 24
11:05:24:setup_element:INFO: Setting the data phase to 16 for uplink 25
11:05:24:setup_element:INFO: Setting the data phase to 10 for uplink 26
11:05:24:setup_element:INFO: Setting the data phase to 15 for uplink 27
11:05:24:setup_element:INFO: Setting the data phase to 14 for uplink 28
11:05:24:setup_element:INFO: Setting the data phase to 17 for uplink 29
11:05:24:setup_element:INFO: Setting the data phase to 15 for uplink 30
11:05:24:setup_element:INFO: Setting the data phase to 14 for uplink 31
11:05:24:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 3
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 72
Eye Windows:
Uplink 16: __________________________________________________________________________XXXXX_
Uplink 17: __________________________________________________________________________XXXXX_
Uplink 18: ________________________________________________________________________XXXXXX__
Uplink 19: ________________________________________________________________________XXXXXX__
Uplink 20: ________________________________________________________________________XXXXXX__
Uplink 21: ________________________________________________________________________XXXXXX__
Uplink 22: _________________________________________________________________________XXXXXX_
Uplink 23: _________________________________________________________________________XXXXXX_
Uplink 24: _______________________________________________________________________XXXXXX___
Uplink 25: _______________________________________________________________________XXXXXX___
Uplink 26: _______________________________________________________________________XXXXXX___
Uplink 27: _______________________________________________________________________XXXXXX___
Uplink 28: ________________________________________________________________________XXXXXX__
Uplink 29: ________________________________________________________________________XXXXXX__
Uplink 30: __________________________________________________________________________XXXX__
Uplink 31: __________________________________________________________________________XXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 17:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 18:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 19:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 20:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 21:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 22:
Optimal Phase: 24
Window Length: 36
Eye Window: ___XXXX_________________________________
Uplink 23:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 24:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 25:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 26:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 27:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 28:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 29:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 30:
Optimal Phase: 15
Window Length: 33
Eye Window: ________________________________XXXXXXX_
Uplink 31:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
]
11:05:24:setup_element:INFO: Beginning SMX ASICs map scan
11:05:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:05:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
11:05:25:master:INFO: Setting encoding mode EOS for groups [0], downlinks [3]
11:05:25:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [3]
11:05:25:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:05:25:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 17
11:05:25:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 16
11:05:25:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 24
11:05:25:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 25
11:05:25:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 19
11:05:25:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 18
11:05:25:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 26
11:05:25:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 27
11:05:25:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 21
11:05:25:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 20
11:05:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 28
11:05:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 29
11:05:26:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 23
11:05:26:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 22
11:05:26:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 30
11:05:26:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 31
11:05:27:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 3
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x1: (ASIC uplink, uplink): (0, 24), (1, 25)
ASIC address 0x2: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x3: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x4: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x5: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x6: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x7: (ASIC uplink, uplink): (0, 30), (1, 31)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 72
Eye Windows:
Uplink 16: __________________________________________________________________________XXXXX_
Uplink 17: __________________________________________________________________________XXXXX_
Uplink 18: ________________________________________________________________________XXXXXX__
Uplink 19: ________________________________________________________________________XXXXXX__
Uplink 20: ________________________________________________________________________XXXXXX__
Uplink 21: ________________________________________________________________________XXXXXX__
Uplink 22: _________________________________________________________________________XXXXXX_
Uplink 23: _________________________________________________________________________XXXXXX_
Uplink 24: _______________________________________________________________________XXXXXX___
Uplink 25: _______________________________________________________________________XXXXXX___
Uplink 26: _______________________________________________________________________XXXXXX___
Uplink 27: _______________________________________________________________________XXXXXX___
Uplink 28: ________________________________________________________________________XXXXXX__
Uplink 29: ________________________________________________________________________XXXXXX__
Uplink 30: __________________________________________________________________________XXXX__
Uplink 31: __________________________________________________________________________XXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 17:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 18:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 19:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 20:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 21:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 22:
Optimal Phase: 24
Window Length: 36
Eye Window: ___XXXX_________________________________
Uplink 23:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 24:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 25:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 26:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 27:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 28:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 29:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 30:
Optimal Phase: 15
Window Length: 33
Eye Window: ________________________________XXXXXXX_
Uplink 31:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
11:05:27:setup_element:INFO: Performing Elink synchronization
11:05:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:05:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
11:05:27:master:INFO: Setting encoding mode EOS for groups [0], downlinks [3]
11:05:27:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [3]
11:05:27:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 3
11:05:27:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:05:27:ST3_emu:INFO: Number of chips: 8
11:05:27:ST3_emu:INFO: Chip address: 0x0
11:05:27:ST3_emu:INFO: Chip address: 0x1
11:05:27:ST3_emu:INFO: Chip address: 0x2
11:05:27:ST3_emu:INFO: Chip address: 0x3
11:05:27:ST3_emu:INFO: Chip address: 0x4
11:05:27:ST3_emu:INFO: Chip address: 0x5
11:05:27:ST3_emu:INFO: Chip address: 0x6
11:05:27:ST3_emu:INFO: Chip address: 0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_0
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_2
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_3
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_4
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_6
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
11:05:28:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
11:05:29:febtest:INFO: 0-0 | XA-000-08-003-000-002-227-06 | 9.3 | 1277.1
11:05:29:febtest:INFO: 0-1 | XA-000-08-003-000-002-229-06 | 31.4 | 1212.7
11:05:29:febtest:INFO: 0-2 | XA-000-08-003-000-002-230-06 | 31.4 | 1206.9
11:05:29:febtest:INFO: 0-3 | XA-000-08-003-000-000-140-14 | 60.0 | 1124.0
11:05:30:febtest:INFO: 0-4 | XA-000-08-003-000-000-139-14 | 44.1 | 1171.5
11:05:30:febtest:INFO: 0-5 | XA-000-08-001-064-042-064-12 | 44.1 | 1183.3
11:05:30:febtest:INFO: 0-6 | XA-000-08-003-000-002-228-06 | 40.9 | 1189.2
11:05:30:febtest:INFO: 0-7 | XA-000-08-001-064-042-056-00 | 37.7 | 1201.0
11:05:30:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
11:05:34:ST3_smx:INFO: chip: 0-0 18.745682 C 1236.187875 mV
11:05:34:ST3_smx:INFO: PROCESS 2: Checking channel response with internal pulse
11:05:34:ST3_smx:INFO: Electrons
11:05:34:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
11:05:35:ST3_smx:INFO: ----> Checking Analog response
11:05:35:ST3_smx:INFO: ----> Checking broken channels
11:05:36:ST3_smx:INFO: Total # broken ch: 3
11:05:36:ST3_smx:INFO: List FAST: [47, 95, 115]
11:05:36:ST3_smx:INFO: List SLOW: []
11:05:36:ST3_smx:INFO: Holes
11:05:36:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
11:05:38:ST3_smx:INFO: ----> Checking Analog response
11:05:38:ST3_smx:INFO: ----> Checking broken channels
11:05:38:ST3_smx:INFO: Total # broken ch: 3
11:05:38:ST3_smx:INFO: List FAST: [47, 95, 115]
11:05:38:ST3_smx:INFO: List SLOW: []
11:05:38:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
11:05:38:febtest:INFO: 0-0 | XA-000-08-003-000-002-227-06 | 21.9 | 1230.3
11:05:39:febtest:INFO: 0-1 | XA-000-08-003-000-002-229-06 | 31.4 | 1212.7
11:05:39:febtest:INFO: 0-2 | XA-000-08-003-000-002-230-06 | 31.4 | 1201.0
11:05:39:febtest:INFO: 0-3 | XA-000-08-003-000-000-140-14 | 56.8 | 1124.0
11:05:39:febtest:INFO: 0-4 | XA-000-08-003-000-000-139-14 | 44.1 | 1171.5
11:05:39:febtest:INFO: 0-5 | XA-000-08-001-064-042-064-12 | 44.1 | 1189.2
11:05:40:febtest:INFO: 0-6 | XA-000-08-003-000-002-228-06 | 40.9 | 1183.3
11:05:40:febtest:INFO: 0-7 | XA-000-08-001-064-042-056-00 | 37.7 | 1201.0
11:05:40:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
11:05:44:ST3_smx:INFO: chip: 0-1 31.389742 C 1195.082160 mV
11:05:44:ST3_smx:INFO: PROCESS 2: Checking channel response with internal pulse
11:05:44:ST3_smx:INFO: Electrons
11:05:44:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
11:05:46:ST3_smx:INFO: ----> Checking Analog response
11:05:46:ST3_smx:INFO: ----> Checking broken channels
11:05:46:ST3_smx:INFO: Total # broken ch: 2
11:05:46:ST3_smx:INFO: List FAST: [82, 122]
11:05:46:ST3_smx:INFO: List SLOW: []
11:05:46:ST3_smx:INFO: Holes
11:05:46:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
11:05:48:ST3_smx:INFO: ----> Checking Analog response
11:05:48:ST3_smx:INFO: ----> Checking broken channels
11:05:48:ST3_smx:INFO: Total # broken ch: 2
11:05:48:ST3_smx:INFO: List FAST: [82, 122]
11:05:48:ST3_smx:INFO: List SLOW: []
11:05:48:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
11:05:48:febtest:INFO: 0-0 | XA-000-08-003-000-002-227-06 | 21.9 | 1230.3
11:05:49:febtest:INFO: 0-1 | XA-000-08-003-000-002-229-06 | 34.6 | 1189.2
11:05:49:febtest:INFO: 0-2 | XA-000-08-003-000-002-230-06 | 31.4 | 1201.0
11:05:49:febtest:INFO: 0-3 | XA-000-08-003-000-000-140-14 | 56.8 | 1118.1
11:05:49:febtest:INFO: 0-4 | XA-000-08-003-000-000-139-14 | 44.1 | 1171.5
11:05:50:febtest:INFO: 0-5 | XA-000-08-001-064-042-064-12 | 44.1 | 1183.3
11:05:50:febtest:INFO: 0-6 | XA-000-08-003-000-002-228-06 | 40.9 | 1183.3
11:05:50:febtest:INFO: 0-7 | XA-000-08-001-064-042-056-00 | 37.7 | 1201.0
11:05:51:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
11:05:54:ST3_smx:INFO: chip: 0-2 37.726682 C 1165.571835 mV
11:05:54:ST3_smx:INFO: PROCESS 2: Checking channel response with internal pulse
11:05:54:ST3_smx:INFO: Electrons
11:05:54:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
11:05:56:ST3_smx:INFO: ----> Checking Analog response
11:05:56:ST3_smx:INFO: ----> Checking broken channels
11:05:56:ST3_smx:INFO: Total # broken ch: 2
11:05:56:ST3_smx:INFO: List FAST: [67, 126]
11:05:56:ST3_smx:INFO: List SLOW: []
11:05:56:ST3_smx:INFO: Holes
11:05:56:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
11:05:58:ST3_smx:INFO: ----> Checking Analog response
11:05:58:ST3_smx:INFO: ----> Checking broken channels
11:05:58:ST3_smx:INFO: Total # broken ch: 2
11:05:58:ST3_smx:INFO: List FAST: [67, 126]
11:05:58:ST3_smx:INFO: List SLOW: []
11:05:58:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
11:05:59:febtest:INFO: 0-0 | XA-000-08-003-000-002-227-06 | 21.9 | 1230.3
11:05:59:febtest:INFO: 0-1 | XA-000-08-003-000-002-229-06 | 34.6 | 1189.2
11:05:59:febtest:INFO: 0-2 | XA-000-08-003-000-002-230-06 | 40.9 | 1165.6
11:05:59:febtest:INFO: 0-3 | XA-000-08-003-000-000-140-14 | 60.0 | 1118.1
11:05:59:febtest:INFO: 0-4 | XA-000-08-003-000-000-139-14 | 44.1 | 1171.5
11:06:00:febtest:INFO: 0-5 | XA-000-08-001-064-042-064-12 | 44.1 | 1183.3
11:06:00:febtest:INFO: 0-6 | XA-000-08-003-000-002-228-06 | 40.9 | 1183.3
11:06:00:febtest:INFO: 0-7 | XA-000-08-001-064-042-056-00 | 37.7 | 1201.0
11:06:01:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
11:06:04:ST3_smx:INFO: chip: 0-3 53.612520 C 1118.096875 mV
11:06:04:ST3_smx:INFO: PROCESS 2: Checking channel response with internal pulse
11:06:04:ST3_smx:INFO: Electrons
11:06:04:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
11:06:06:ST3_smx:INFO: ----> Checking Analog response
11:06:06:ST3_smx:INFO: ----> Checking broken channels
11:06:07:ST3_smx:INFO: Total # broken ch: 3
11:06:07:ST3_smx:INFO: List FAST: [19, 36, 101]
11:06:07:ST3_smx:INFO: List SLOW: []
11:06:07:ST3_smx:INFO: Holes
11:06:07:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
11:06:08:ST3_smx:INFO: ----> Checking Analog response
11:06:08:ST3_smx:INFO: ----> Checking broken channels
11:06:09:ST3_smx:INFO: Total # broken ch: 3
11:06:09:ST3_smx:INFO: List FAST: [19, 36, 101]
11:06:09:ST3_smx:INFO: List SLOW: []
11:06:09:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
11:06:09:febtest:INFO: 0-0 | XA-000-08-003-000-002-227-06 | 21.9 | 1224.5
11:06:09:febtest:INFO: 0-1 | XA-000-08-003-000-002-229-06 | 34.6 | 1183.3
11:06:09:febtest:INFO: 0-2 | XA-000-08-003-000-002-230-06 | 37.7 | 1165.6
11:06:10:febtest:INFO: 0-3 | XA-000-08-003-000-000-140-14 | 56.8 | 1112.1
11:06:10:febtest:INFO: 0-4 | XA-000-08-003-000-000-139-14 | 44.1 | 1171.5
11:06:10:febtest:INFO: 0-5 | XA-000-08-001-064-042-064-12 | 44.1 | 1183.3
11:06:10:febtest:INFO: 0-6 | XA-000-08-003-000-002-228-06 | 40.9 | 1183.3
11:06:10:febtest:INFO: 0-7 | XA-000-08-001-064-042-056-00 | 37.7 | 1195.1
11:06:11:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
11:06:15:ST3_smx:INFO: chip: 0-4 47.250730 C 1147.806000 mV
11:06:15:ST3_smx:INFO: PROCESS 2: Checking channel response with internal pulse
11:06:15:ST3_smx:INFO: Electrons
11:06:15:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
11:06:16:ST3_smx:INFO: ----> Checking Analog response
11:06:16:ST3_smx:INFO: ----> Checking broken channels
11:06:17:ST3_smx:INFO: Total # broken ch: 2
11:06:17:ST3_smx:INFO: List FAST: [89, 103]
11:06:17:ST3_smx:INFO: List SLOW: []
11:06:17:ST3_smx:INFO: Holes
11:06:17:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
11:06:19:ST3_smx:INFO: ----> Checking Analog response
11:06:19:ST3_smx:INFO: ----> Checking broken channels
11:06:19:ST3_smx:INFO: Total # broken ch: 2
11:06:19:ST3_smx:INFO: List FAST: [89, 103]
11:06:19:ST3_smx:INFO: List SLOW: []
11:06:19:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
11:06:19:febtest:INFO: 0-0 | XA-000-08-003-000-002-227-06 | 21.9 | 1224.5
11:06:19:febtest:INFO: 0-1 | XA-000-08-003-000-002-229-06 | 34.6 | 1183.3
11:06:20:febtest:INFO: 0-2 | XA-000-08-003-000-002-230-06 | 37.7 | 1165.6
11:06:20:febtest:INFO: 0-3 | XA-000-08-003-000-000-140-14 | 56.8 | 1112.1
11:06:20:febtest:INFO: 0-4 | XA-000-08-003-000-000-139-14 | 47.3 | 1147.8
11:06:20:febtest:INFO: 0-5 | XA-000-08-001-064-042-064-12 | 44.1 | 1183.3
11:06:20:febtest:INFO: 0-6 | XA-000-08-003-000-002-228-06 | 40.9 | 1177.4
11:06:21:febtest:INFO: 0-7 | XA-000-08-001-064-042-056-00 | 37.7 | 1195.1
11:06:21:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
11:06:25:ST3_smx:INFO: chip: 0-5 40.898880 C 1171.483840 mV
11:06:25:ST3_smx:INFO: PROCESS 2: Checking channel response with internal pulse
11:06:25:ST3_smx:INFO: Electrons
11:06:25:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
11:06:27:ST3_smx:INFO: ----> Checking Analog response
11:06:27:ST3_smx:INFO: ----> Checking broken channels
11:06:27:ST3_smx:INFO: Total # broken ch: 8
11:06:27:ST3_smx:INFO: List FAST: [8, 9, 60, 79, 84, 90, 94, 110]
11:06:27:ST3_smx:INFO: List SLOW: []
11:06:27:ST3_smx:INFO: Holes
11:06:27:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
11:06:29:ST3_smx:INFO: ----> Checking Analog response
11:06:29:ST3_smx:INFO: ----> Checking broken channels
11:06:30:ST3_smx:INFO: Total # broken ch: 8
11:06:30:ST3_smx:INFO: List FAST: [8, 9, 60, 79, 84, 90, 94, 110]
11:06:30:ST3_smx:INFO: List SLOW: []
11:06:30:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
11:06:30:febtest:INFO: 0-0 | XA-000-08-003-000-002-227-06 | 21.9 | 1224.5
11:06:30:febtest:INFO: 0-1 | XA-000-08-003-000-002-229-06 | 34.6 | 1183.3
11:06:30:febtest:INFO: 0-2 | XA-000-08-003-000-002-230-06 | 37.7 | 1165.6
11:06:30:febtest:INFO: 0-3 | XA-000-08-003-000-000-140-14 | 56.8 | 1112.1
11:06:31:febtest:INFO: 0-4 | XA-000-08-003-000-000-139-14 | 47.3 | 1141.9
11:06:31:febtest:INFO: 0-5 | XA-000-08-001-064-042-064-12 | 44.1 | 1165.6
11:06:31:febtest:INFO: 0-6 | XA-000-08-003-000-002-228-06 | 40.9 | 1183.3
11:06:31:febtest:INFO: 0-7 | XA-000-08-001-064-042-056-00 | 37.7 | 1195.1
11:06:32:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
11:06:35:ST3_smx:INFO: chip: 0-6 37.726682 C 1189.190035 mV
11:06:35:ST3_smx:INFO: PROCESS 2: Checking channel response with internal pulse
11:06:35:ST3_smx:INFO: Electrons
11:06:35:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
11:06:37:ST3_smx:INFO: ----> Checking Analog response
11:06:37:ST3_smx:INFO: ----> Checking broken channels
11:06:38:ST3_smx:INFO: Total # broken ch: 6
11:06:38:ST3_smx:INFO: List FAST: [4, 10, 88, 93, 115, 122]
11:06:38:ST3_smx:INFO: List SLOW: []
11:06:38:ST3_smx:INFO: Holes
11:06:38:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
11:06:40:ST3_smx:INFO: ----> Checking Analog response
11:06:40:ST3_smx:INFO: ----> Checking broken channels
11:06:40:ST3_smx:INFO: Total # broken ch: 6
11:06:40:ST3_smx:INFO: List FAST: [4, 10, 88, 93, 115, 122]
11:06:40:ST3_smx:INFO: List SLOW: []
11:06:40:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
11:06:40:febtest:INFO: 0-0 | XA-000-08-003-000-002-227-06 | 21.9 | 1224.5
11:06:40:febtest:INFO: 0-1 | XA-000-08-003-000-002-229-06 | 34.6 | 1183.3
11:06:41:febtest:INFO: 0-2 | XA-000-08-003-000-002-230-06 | 37.7 | 1159.7
11:06:41:febtest:INFO: 0-3 | XA-000-08-003-000-000-140-14 | 56.8 | 1112.1
11:06:41:febtest:INFO: 0-4 | XA-000-08-003-000-000-139-14 | 47.3 | 1141.9
11:06:41:febtest:INFO: 0-5 | XA-000-08-001-064-042-064-12 | 44.1 | 1165.6
11:06:41:febtest:INFO: 0-6 | XA-000-08-003-000-002-228-06 | 37.7 | 1183.3
11:06:42:febtest:INFO: 0-7 | XA-000-08-001-064-042-056-00 | 37.7 | 1195.1
11:06:42:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
11:06:46:ST3_smx:INFO: chip: 0-7 31.389742 C 1212.728715 mV
11:06:46:ST3_smx:INFO: PROCESS 2: Checking channel response with internal pulse
11:06:46:ST3_smx:INFO: Electrons
11:06:46:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
11:06:49:ST3_smx:INFO: ----> Checking Analog response
11:06:49:ST3_smx:INFO: ----> Checking broken channels
11:06:49:ST3_smx:INFO: Total # broken ch: 4
11:06:49:ST3_smx:INFO: List FAST: [50, 51, 104, 124]
11:06:49:ST3_smx:INFO: List SLOW: []
11:06:49:ST3_smx:INFO: Holes
11:06:49:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
11:06:52:ST3_smx:INFO: ----> Checking Analog response
11:06:52:ST3_smx:INFO: ----> Checking broken channels
11:06:53:ST3_smx:INFO: Total # broken ch: 4
11:06:53:ST3_smx:INFO: List FAST: [50, 51, 104, 124]
11:06:53:ST3_smx:INFO: List SLOW: []
11:06:53:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
11:06:53:febtest:INFO: 0-0 | XA-000-08-003-000-002-227-06 | 21.9 | 1218.6
11:06:53:febtest:INFO: 0-1 | XA-000-08-003-000-002-229-06 | 34.6 | 1183.3
11:06:53:febtest:INFO: 0-2 | XA-000-08-003-000-002-230-06 | 37.7 | 1159.7
11:06:53:febtest:INFO: 0-3 | XA-000-08-003-000-000-140-14 | 56.8 | 1112.1
11:06:54:febtest:INFO: 0-4 | XA-000-08-003-000-000-139-14 | 47.3 | 1141.9
11:06:54:febtest:INFO: 0-5 | XA-000-08-001-064-042-064-12 | 44.1 | 1165.6
11:06:54:febtest:INFO: 0-6 | XA-000-08-003-000-002-228-06 | 37.7 | 1183.3
11:06:54:febtest:INFO: 0-7 | XA-000-08-001-064-042-056-00 | 34.6 | 1206.9
############################################################
# S U M M A R Y #
############################################################
{'TEST_NAME': 'FEB-ASIC', 'TEST_DATE': '2023_11_23-11_05_16', 'OPERATOR': 'Benjamin; Irakli; ', 'PROJECT': 'Test', 'SITE': 'KIT', 'SETUP': 'KIT_TEST_SETUP_1', 'ASIC_ID': 'XA-000-08-001-064-042-056-00', 'FUSED_ID': 6359364698915382144, 'HW_ADDR': 7, 'VERS_NO': '2.2', 'CABLE_SET_ID': '', 'IC_TEMP': '0', 'VDDM': '0', 'AUX': '0', 'CSABIAS': '0', 'VDDM_INT': '0', 'ADC_Chi2': 0.0, 'ADC_NDF': 0, 'ADC_P0': 0.0, 'ADC_P1': 0.006824, 'ADC_P2': -2.485e-06, 'ADC_P0err': 0.001, 'ADC_P1err': 0.001, 'ADC_P2err': 1e-05, 'ADC_VREF_P': 58, 'ADC_VREF_N': 30, 'ADC_VREF_T': 128, 'ADC_VREF_TR': 122, 'THR2_GLB': 30, 'LOOP__PLS': 100, 'CALIB_PLS': 250, 'SnsLoop': 5, 'IFED': 31, 'CSA_BIAS': 15, 'CSA_Chi2': 0.0, 'CSA_NDF': 0, 'CSA_P0': 0.0, 'CSA_P1': 0.0, 'CSA_P2': 0.0, 'CSA_P0err': 0.0, 'CSA_P1err': 0.0, 'CSA_P2err': 0.0, 'CONF_FAIL_REG': 0, 'N_BROKEN_DISC': 4, 'N_BROKEN_FAST': '[50, 51, 104, 124]', 'N_BROKEN_SLOW': '[]', 'P_BROKEN_DISC': 4, 'P_BROKEN_FAST': '[50, 51, 104, 124]', 'P_BROKEN_SLOW': '[]', 'ASIC_QA_category': '', 'N_BROKEN_CABLE': 0, 'LIST_OF_BROKEN_CABLES': 0, 'VI_bInit': ['2.800', '1.5630', '2.202', '2.6580', '0.000', '0.0000', '7.000', '0.7697'], 'VI_aInit': ['2.800', '1.9980', '2.200', '1.4610', '0.000', '0.0000', '7.000', '0.7689'], 'VI_atEnd': ['0', '0', '0', '0', '0', '0'], 'AMP_CAL': 110, 'PlsLoop': 3, 'N_ANA_PRESENT': 'Analog response OK', 'N_DISC_FAIL_CH': 0, 'N_ANA_FAIL_CH': '0', 'P_ANA_PRESENT': 'Analog response OK', 'P_DISC_FAIL_CH': 0, 'P_ANA_FAIL_CH': '0'}
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{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
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{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
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{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
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{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
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{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
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{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
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{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
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{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
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11:07:55:febtest:INFO: FEB 8-2 A @ GSI
11:08:04:ST3_Shared:INFO: Listo of operators:Henrik; Benjamin; Irakli;
11:08:07:ST3_Shared:INFO: /home/cbm/public_html/Test_LogDir//FEB/FEB_1022/TestDate_2023_11_23-11_05_16/